linux/include/linux/mfd/wm8350/core.h

/* SPDX-License-Identifier: GPL-2.0-or-later */
/*
 * core.h  --  Core Driver for Wolfson WM8350 PMIC
 *
 * Copyright 2007 Wolfson Microelectronics PLC
 */

#ifndef __LINUX_MFD_WM8350_CORE_H_
#define __LINUX_MFD_WM8350_CORE_H_

#include <linux/kernel.h>
#include <linux/mutex.h>
#include <linux/interrupt.h>
#include <linux/completion.h>
#include <linux/regmap.h>

#include <linux/mfd/wm8350/audio.h>
#include <linux/mfd/wm8350/gpio.h>
#include <linux/mfd/wm8350/pmic.h>
#include <linux/mfd/wm8350/rtc.h>
#include <linux/mfd/wm8350/supply.h>
#include <linux/mfd/wm8350/wdt.h>

/*
 * Register values.
 */
#define WM8350_RESET_ID
#define WM8350_ID
#define WM8350_REVISION
#define WM8350_SYSTEM_CONTROL_1
#define WM8350_SYSTEM_CONTROL_2
#define WM8350_SYSTEM_HIBERNATE
#define WM8350_INTERFACE_CONTROL
#define WM8350_POWER_MGMT_1
#define WM8350_POWER_MGMT_2
#define WM8350_POWER_MGMT_3
#define WM8350_POWER_MGMT_4
#define WM8350_POWER_MGMT_5
#define WM8350_POWER_MGMT_6
#define WM8350_POWER_MGMT_7

#define WM8350_SYSTEM_INTERRUPTS
#define WM8350_INT_STATUS_1
#define WM8350_INT_STATUS_2
#define WM8350_POWER_UP_INT_STATUS
#define WM8350_UNDER_VOLTAGE_INT_STATUS
#define WM8350_OVER_CURRENT_INT_STATUS
#define WM8350_GPIO_INT_STATUS
#define WM8350_COMPARATOR_INT_STATUS
#define WM8350_SYSTEM_INTERRUPTS_MASK
#define WM8350_INT_STATUS_1_MASK
#define WM8350_INT_STATUS_2_MASK
#define WM8350_POWER_UP_INT_STATUS_MASK
#define WM8350_UNDER_VOLTAGE_INT_STATUS_MASK
#define WM8350_OVER_CURRENT_INT_STATUS_MASK
#define WM8350_GPIO_INT_STATUS_MASK
#define WM8350_COMPARATOR_INT_STATUS_MASK
#define WM8350_CHARGER_OVERRIDES
#define WM8350_MISC_OVERRIDES
#define WM8350_COMPARATOR_OVERRIDES
#define WM8350_STATE_MACHINE_STATUS

#define WM8350_MAX_REGISTER

#define WM8350_UNLOCK_KEY
#define WM8350_LOCK_KEY

/*
 * Field Definitions.
 */

/*
 * R0 (0x00) - Reset/ID
 */
#define WM8350_SW_RESET_CHIP_ID_MASK

/*
 * R1 (0x01) - ID
 */
#define WM8350_CHIP_REV_MASK
#define WM8350_CONF_STS_MASK
#define WM8350_CUST_ID_MASK

/*
 * R2 (0x02) - Revision
 */
#define WM8350_MASK_REV_MASK

/*
 * R3 (0x03) - System Control 1
 */
#define WM8350_CHIP_ON
#define WM8350_POWERCYCLE
#define WM8350_VCC_FAULT_OV
#define WM8350_REG_RSTB_TIME_MASK
#define WM8350_BG_SLEEP
#define WM8350_MEM_VALID
#define WM8350_CHIP_SET_UP
#define WM8350_ON_DEB_T
#define WM8350_ON_POL
#define WM8350_IRQ_POL

/*
 * R4 (0x04) - System Control 2
 */
#define WM8350_USB_SUSPEND_8MA
#define WM8350_USB_SUSPEND
#define WM8350_USB_MSTR
#define WM8350_USB_MSTR_SRC
#define WM8350_USB_500MA
#define WM8350_USB_NOLIM

/*
 * R5 (0x05) - System Hibernate
 */
#define WM8350_HIBERNATE
#define WM8350_WDOG_HIB_MODE
#define WM8350_REG_HIB_STARTUP_SEQ
#define WM8350_REG_RESET_HIB_MODE
#define WM8350_RST_HIB_MODE
#define WM8350_IRQ_HIB_MODE
#define WM8350_MEMRST_HIB_MODE
#define WM8350_PCCOMP_HIB_MODE
#define WM8350_TEMPMON_HIB_MODE

/*
 * R6 (0x06) - Interface Control
 */
#define WM8350_USE_DEV_PINS
#define WM8350_USE_DEV_PINS_MASK
#define WM8350_USE_DEV_PINS_SHIFT
#define WM8350_DEV_ADDR_MASK
#define WM8350_DEV_ADDR_SHIFT
#define WM8350_CONFIG_DONE
#define WM8350_CONFIG_DONE_MASK
#define WM8350_CONFIG_DONE_SHIFT
#define WM8350_RECONFIG_AT_ON
#define WM8350_RECONFIG_AT_ON_MASK
#define WM8350_RECONFIG_AT_ON_SHIFT
#define WM8350_AUTOINC
#define WM8350_AUTOINC_MASK
#define WM8350_AUTOINC_SHIFT
#define WM8350_ARA
#define WM8350_ARA_MASK
#define WM8350_ARA_SHIFT
#define WM8350_SPI_CFG
#define WM8350_SPI_CFG_MASK
#define WM8350_SPI_CFG_SHIFT
#define WM8350_SPI_4WIRE
#define WM8350_SPI_4WIRE_MASK
#define WM8350_SPI_4WIRE_SHIFT
#define WM8350_SPI_3WIRE
#define WM8350_SPI_3WIRE_MASK
#define WM8350_SPI_3WIRE_SHIFT

/* Bit values for R06 (0x06) */
#define WM8350_USE_DEV_PINS_PRIMARY
#define WM8350_USE_DEV_PINS_DEV

#define WM8350_DEV_ADDR_34
#define WM8350_DEV_ADDR_36
#define WM8350_DEV_ADDR_3C
#define WM8350_DEV_ADDR_3E

#define WM8350_CONFIG_DONE_OFF
#define WM8350_CONFIG_DONE_DONE

#define WM8350_RECONFIG_AT_ON_OFF
#define WM8350_RECONFIG_AT_ON_ON

#define WM8350_AUTOINC_OFF
#define WM8350_AUTOINC_ON

#define WM8350_ARA_OFF
#define WM8350_ARA_ON

#define WM8350_SPI_CFG_CMOS
#define WM8350_SPI_CFG_OD

#define WM8350_SPI_4WIRE_3WIRE
#define WM8350_SPI_4WIRE_4WIRE

#define WM8350_SPI_3WIRE_I2C
#define WM8350_SPI_3WIRE_SPI

/*
 * R8 (0x08) - Power mgmt (1)
 */
#define WM8350_CODEC_ISEL_MASK
#define WM8350_VBUFEN
#define WM8350_OUTPUT_DRAIN_EN
#define WM8350_MIC_DET_ENA
#define WM8350_BIASEN
#define WM8350_MICBEN
#define WM8350_VMIDEN
#define WM8350_VMID_MASK
#define WM8350_VMID_SHIFT

/*
 * R9 (0x09) - Power mgmt (2)
 */
#define WM8350_IN3R_ENA
#define WM8350_IN3L_ENA
#define WM8350_INR_ENA
#define WM8350_INL_ENA
#define WM8350_MIXINR_ENA
#define WM8350_MIXINL_ENA
#define WM8350_OUT4_ENA
#define WM8350_OUT3_ENA
#define WM8350_MIXOUTR_ENA
#define WM8350_MIXOUTL_ENA

/*
 * R10 (0x0A) - Power mgmt (3)
 */
#define WM8350_IN3R_TO_OUT2R
#define WM8350_OUT2R_ENA
#define WM8350_OUT2L_ENA
#define WM8350_OUT1R_ENA
#define WM8350_OUT1L_ENA

/*
 * R11 (0x0B) - Power mgmt (4)
 */
#define WM8350_SYSCLK_ENA
#define WM8350_ADC_HPF_ENA
#define WM8350_FLL_ENA
#define WM8350_FLL_OSC_ENA
#define WM8350_TOCLK_ENA
#define WM8350_DACR_ENA
#define WM8350_DACL_ENA
#define WM8350_ADCR_ENA
#define WM8350_ADCL_ENA

/*
 * R12 (0x0C) - Power mgmt (5)
 */
#define WM8350_CODEC_ENA
#define WM8350_RTC_TICK_ENA
#define WM8350_OSC32K_ENA
#define WM8350_CHG_ENA
#define WM8350_ACC_DET_ENA
#define WM8350_AUXADC_ENA
#define WM8350_DCMP4_ENA
#define WM8350_DCMP3_ENA
#define WM8350_DCMP2_ENA
#define WM8350_DCMP1_ENA

/*
 * R13 (0x0D) - Power mgmt (6)
 */
#define WM8350_LS_ENA
#define WM8350_LDO4_ENA
#define WM8350_LDO3_ENA
#define WM8350_LDO2_ENA
#define WM8350_LDO1_ENA
#define WM8350_DC6_ENA
#define WM8350_DC5_ENA
#define WM8350_DC4_ENA
#define WM8350_DC3_ENA
#define WM8350_DC2_ENA
#define WM8350_DC1_ENA

/*
 * R14 (0x0E) - Power mgmt (7)
 */
#define WM8350_CS2_ENA
#define WM8350_CS1_ENA

/*
 * R24 (0x18) - System Interrupts
 */
#define WM8350_OC_INT
#define WM8350_UV_INT
#define WM8350_PUTO_INT
#define WM8350_CS_INT
#define WM8350_EXT_INT
#define WM8350_CODEC_INT
#define WM8350_GP_INT
#define WM8350_AUXADC_INT
#define WM8350_RTC_INT
#define WM8350_SYS_INT
#define WM8350_CHG_INT
#define WM8350_USB_INT
#define WM8350_WKUP_INT

/*
 * R25 (0x19) - Interrupt Status 1
 */
#define WM8350_CHG_BAT_HOT_EINT
#define WM8350_CHG_BAT_COLD_EINT
#define WM8350_CHG_BAT_FAIL_EINT
#define WM8350_CHG_TO_EINT
#define WM8350_CHG_END_EINT
#define WM8350_CHG_START_EINT
#define WM8350_CHG_FAST_RDY_EINT
#define WM8350_RTC_PER_EINT
#define WM8350_RTC_SEC_EINT
#define WM8350_RTC_ALM_EINT
#define WM8350_CHG_VBATT_LT_3P9_EINT
#define WM8350_CHG_VBATT_LT_3P1_EINT
#define WM8350_CHG_VBATT_LT_2P85_EINT

/*
 * R26 (0x1A) - Interrupt Status 2
 */
#define WM8350_CS1_EINT
#define WM8350_CS2_EINT
#define WM8350_USB_LIMIT_EINT
#define WM8350_AUXADC_DATARDY_EINT
#define WM8350_AUXADC_DCOMP4_EINT
#define WM8350_AUXADC_DCOMP3_EINT
#define WM8350_AUXADC_DCOMP2_EINT
#define WM8350_AUXADC_DCOMP1_EINT
#define WM8350_SYS_HYST_COMP_FAIL_EINT
#define WM8350_SYS_CHIP_GT115_EINT
#define WM8350_SYS_CHIP_GT140_EINT
#define WM8350_SYS_WDOG_TO_EINT

/*
 * R27 (0x1B) - Power Up Interrupt Status
 */
#define WM8350_PUTO_LDO4_EINT
#define WM8350_PUTO_LDO3_EINT
#define WM8350_PUTO_LDO2_EINT
#define WM8350_PUTO_LDO1_EINT
#define WM8350_PUTO_DC6_EINT
#define WM8350_PUTO_DC5_EINT
#define WM8350_PUTO_DC4_EINT
#define WM8350_PUTO_DC3_EINT
#define WM8350_PUTO_DC2_EINT
#define WM8350_PUTO_DC1_EINT

/*
 * R28 (0x1C) - Under Voltage Interrupt status
 */
#define WM8350_UV_LDO4_EINT
#define WM8350_UV_LDO3_EINT
#define WM8350_UV_LDO2_EINT
#define WM8350_UV_LDO1_EINT
#define WM8350_UV_DC6_EINT
#define WM8350_UV_DC5_EINT
#define WM8350_UV_DC4_EINT
#define WM8350_UV_DC3_EINT
#define WM8350_UV_DC2_EINT
#define WM8350_UV_DC1_EINT

/*
 * R29 (0x1D) - Over Current Interrupt status
 */
#define WM8350_OC_LS_EINT

/*
 * R30 (0x1E) - GPIO Interrupt Status
 */
#define WM8350_GP12_EINT
#define WM8350_GP11_EINT
#define WM8350_GP10_EINT
#define WM8350_GP9_EINT
#define WM8350_GP8_EINT
#define WM8350_GP7_EINT
#define WM8350_GP6_EINT
#define WM8350_GP5_EINT
#define WM8350_GP4_EINT
#define WM8350_GP3_EINT
#define WM8350_GP2_EINT
#define WM8350_GP1_EINT
#define WM8350_GP0_EINT

/*
 * R31 (0x1F) - Comparator Interrupt Status
 */
#define WM8350_EXT_USB_FB_EINT
#define WM8350_EXT_WALL_FB_EINT
#define WM8350_EXT_BAT_FB_EINT
#define WM8350_CODEC_JCK_DET_L_EINT
#define WM8350_CODEC_JCK_DET_R_EINT
#define WM8350_CODEC_MICSCD_EINT
#define WM8350_CODEC_MICD_EINT
#define WM8350_WKUP_OFF_STATE_EINT
#define WM8350_WKUP_HIB_STATE_EINT
#define WM8350_WKUP_CONV_FAULT_EINT
#define WM8350_WKUP_WDOG_RST_EINT
#define WM8350_WKUP_GP_PWR_ON_EINT
#define WM8350_WKUP_ONKEY_EINT
#define WM8350_WKUP_GP_WAKEUP_EINT

/*
 * R32 (0x20) - System Interrupts Mask
 */
#define WM8350_IM_OC_INT
#define WM8350_IM_UV_INT
#define WM8350_IM_PUTO_INT
#define WM8350_IM_SPARE_INT
#define WM8350_IM_CS_INT
#define WM8350_IM_EXT_INT
#define WM8350_IM_CODEC_INT
#define WM8350_IM_GP_INT
#define WM8350_IM_AUXADC_INT
#define WM8350_IM_RTC_INT
#define WM8350_IM_SYS_INT
#define WM8350_IM_CHG_INT
#define WM8350_IM_USB_INT
#define WM8350_IM_WKUP_INT

/*
 * R33 (0x21) - Interrupt Status 1 Mask
 */
#define WM8350_IM_CHG_BAT_HOT_EINT
#define WM8350_IM_CHG_BAT_COLD_EINT
#define WM8350_IM_CHG_BAT_FAIL_EINT
#define WM8350_IM_CHG_TO_EINT
#define WM8350_IM_CHG_END_EINT
#define WM8350_IM_CHG_START_EINT
#define WM8350_IM_CHG_FAST_RDY_EINT
#define WM8350_IM_RTC_PER_EINT
#define WM8350_IM_RTC_SEC_EINT
#define WM8350_IM_RTC_ALM_EINT
#define WM8350_IM_CHG_VBATT_LT_3P9_EINT
#define WM8350_IM_CHG_VBATT_LT_3P1_EINT
#define WM8350_IM_CHG_VBATT_LT_2P85_EINT

/*
 * R34 (0x22) - Interrupt Status 2 Mask
 */
#define WM8350_IM_SPARE2_EINT
#define WM8350_IM_SPARE1_EINT
#define WM8350_IM_CS1_EINT
#define WM8350_IM_CS2_EINT
#define WM8350_IM_USB_LIMIT_EINT
#define WM8350_IM_AUXADC_DATARDY_EINT
#define WM8350_IM_AUXADC_DCOMP4_EINT
#define WM8350_IM_AUXADC_DCOMP3_EINT
#define WM8350_IM_AUXADC_DCOMP2_EINT
#define WM8350_IM_AUXADC_DCOMP1_EINT
#define WM8350_IM_SYS_HYST_COMP_FAIL_EINT
#define WM8350_IM_SYS_CHIP_GT115_EINT
#define WM8350_IM_SYS_CHIP_GT140_EINT
#define WM8350_IM_SYS_WDOG_TO_EINT

/*
 * R35 (0x23) - Power Up Interrupt Status Mask
 */
#define WM8350_IM_PUTO_LDO4_EINT
#define WM8350_IM_PUTO_LDO3_EINT
#define WM8350_IM_PUTO_LDO2_EINT
#define WM8350_IM_PUTO_LDO1_EINT
#define WM8350_IM_PUTO_DC6_EINT
#define WM8350_IM_PUTO_DC5_EINT
#define WM8350_IM_PUTO_DC4_EINT
#define WM8350_IM_PUTO_DC3_EINT
#define WM8350_IM_PUTO_DC2_EINT
#define WM8350_IM_PUTO_DC1_EINT

/*
 * R36 (0x24) - Under Voltage Interrupt status Mask
 */
#define WM8350_IM_UV_LDO4_EINT
#define WM8350_IM_UV_LDO3_EINT
#define WM8350_IM_UV_LDO2_EINT
#define WM8350_IM_UV_LDO1_EINT
#define WM8350_IM_UV_DC6_EINT
#define WM8350_IM_UV_DC5_EINT
#define WM8350_IM_UV_DC4_EINT
#define WM8350_IM_UV_DC3_EINT
#define WM8350_IM_UV_DC2_EINT
#define WM8350_IM_UV_DC1_EINT

/*
 * R37 (0x25) - Over Current Interrupt status Mask
 */
#define WM8350_IM_OC_LS_EINT

/*
 * R38 (0x26) - GPIO Interrupt Status Mask
 */
#define WM8350_IM_GP12_EINT
#define WM8350_IM_GP11_EINT
#define WM8350_IM_GP10_EINT
#define WM8350_IM_GP9_EINT
#define WM8350_IM_GP8_EINT
#define WM8350_IM_GP7_EINT
#define WM8350_IM_GP6_EINT
#define WM8350_IM_GP5_EINT
#define WM8350_IM_GP4_EINT
#define WM8350_IM_GP3_EINT
#define WM8350_IM_GP2_EINT
#define WM8350_IM_GP1_EINT
#define WM8350_IM_GP0_EINT

/*
 * R39 (0x27) - Comparator Interrupt Status Mask
 */
#define WM8350_IM_EXT_USB_FB_EINT
#define WM8350_IM_EXT_WALL_FB_EINT
#define WM8350_IM_EXT_BAT_FB_EINT
#define WM8350_IM_CODEC_JCK_DET_L_EINT
#define WM8350_IM_CODEC_JCK_DET_R_EINT
#define WM8350_IM_CODEC_MICSCD_EINT
#define WM8350_IM_CODEC_MICD_EINT
#define WM8350_IM_WKUP_OFF_STATE_EINT
#define WM8350_IM_WKUP_HIB_STATE_EINT
#define WM8350_IM_WKUP_CONV_FAULT_EINT
#define WM8350_IM_WKUP_WDOG_RST_EINT
#define WM8350_IM_WKUP_GP_PWR_ON_EINT
#define WM8350_IM_WKUP_ONKEY_EINT
#define WM8350_IM_WKUP_GP_WAKEUP_EINT

/*
 * R220 (0xDC) - RAM BIST 1
 */
#define WM8350_READ_STATUS
#define WM8350_TSTRAM_CLK
#define WM8350_TSTRAM_CLK_ENA
#define WM8350_STARTSEQ
#define WM8350_READ_SRC
#define WM8350_COUNT_DIR
#define WM8350_TSTRAM_MODE_MASK
#define WM8350_TSTRAM_ENA

/*
 * R225 (0xE1) - DCDC/LDO status
 */
#define WM8350_LS_STS
#define WM8350_LDO4_STS
#define WM8350_LDO3_STS
#define WM8350_LDO2_STS
#define WM8350_LDO1_STS
#define WM8350_DC6_STS
#define WM8350_DC5_STS
#define WM8350_DC4_STS
#define WM8350_DC3_STS
#define WM8350_DC2_STS
#define WM8350_DC1_STS

/*
 * R226 (0xE2) - Charger status
 */
#define WM8350_CHG_BATT_HOT_OVRDE
#define WM8350_CHG_BATT_COLD_OVRDE

/*
 * R227 (0xE3) - Misc Overrides
 */
#define WM8350_USB_LIMIT_OVRDE

/*
 * R227 (0xE7) - Comparator Overrides
 */
#define WM8350_USB_FB_OVRDE
#define WM8350_WALL_FB_OVRDE
#define WM8350_BATT_FB_OVRDE


/*
 * R233 (0xE9) - State Machinine Status
 */
#define WM8350_USB_SM_MASK
#define WM8350_USB_SM_SHIFT

#define WM8350_USB_SM_100_SLV
#define WM8350_USB_SM_500_SLV
#define WM8350_USB_SM_STDBY_SLV

/* WM8350 wake up conditions */
#define WM8350_IRQ_WKUP_OFF_STATE
#define WM8350_IRQ_WKUP_HIB_STATE
#define WM8350_IRQ_WKUP_CONV_FAULT
#define WM8350_IRQ_WKUP_WDOG_RST
#define WM8350_IRQ_WKUP_GP_PWR_ON
#define WM8350_IRQ_WKUP_ONKEY
#define WM8350_IRQ_WKUP_GP_WAKEUP

/* wm8350 chip revisions */
#define WM8350_REV_E
#define WM8350_REV_F
#define WM8350_REV_G
#define WM8350_REV_H

#define WM8350_NUM_IRQ

#define WM8350_NUM_IRQ_REGS

extern const struct regmap_config wm8350_regmap;

struct wm8350;

struct wm8350_hwmon {};

struct wm8350 {};

/**
 * Data to be supplied by the platform to initialise the WM8350.
 *
 * @init: Function called during driver initialisation.  Should be
 *        used by the platform to configure GPIO functions and similar.
 * @irq_high: Set if WM8350 IRQ is active high.
 * @irq_base: Base IRQ for genirq (not currently used).
 * @gpio_base: Base for gpiolib.
 */
struct wm8350_platform_data {};


/*
 * WM8350 device initialisation and exit.
 */
int wm8350_device_init(struct wm8350 *wm8350, int irq,
		       struct wm8350_platform_data *pdata);

/*
 * WM8350 device IO
 */
int wm8350_clear_bits(struct wm8350 *wm8350, u16 reg, u16 mask);
int wm8350_set_bits(struct wm8350 *wm8350, u16 reg, u16 mask);
u16 wm8350_reg_read(struct wm8350 *wm8350, int reg);
int wm8350_reg_write(struct wm8350 *wm8350, int reg, u16 val);
int wm8350_reg_lock(struct wm8350 *wm8350);
int wm8350_reg_unlock(struct wm8350 *wm8350);
int wm8350_block_read(struct wm8350 *wm8350, int reg, int size, u16 *dest);
int wm8350_block_write(struct wm8350 *wm8350, int reg, int size, u16 *src);

/*
 * WM8350 internal interrupts
 */
static inline int wm8350_register_irq(struct wm8350 *wm8350, int irq,
				      irq_handler_t handler,
				      unsigned long flags,
				      const char *name, void *data)
{}

static inline void wm8350_free_irq(struct wm8350 *wm8350, int irq, void *data)
{}

static inline void wm8350_mask_irq(struct wm8350 *wm8350, int irq)
{}

static inline void wm8350_unmask_irq(struct wm8350 *wm8350, int irq)
{}

int wm8350_irq_init(struct wm8350 *wm8350, int irq,
		    struct wm8350_platform_data *pdata);
int wm8350_irq_exit(struct wm8350 *wm8350);

#endif