// SPDX-License-Identifier: GPL-2.0+ /* * Driver for Analog Devices Industrial Ethernet PHYs * * Copyright 2019 Analog Devices Inc. */ #include <linux/kernel.h> #include <linux/bitfield.h> #include <linux/delay.h> #include <linux/errno.h> #include <linux/ethtool_netlink.h> #include <linux/init.h> #include <linux/module.h> #include <linux/mii.h> #include <linux/phy.h> #include <linux/property.h> #define PHY_ID_ADIN1200 … #define PHY_ID_ADIN1300 … #define ADIN1300_MII_EXT_REG_PTR … #define ADIN1300_MII_EXT_REG_DATA … #define ADIN1300_PHY_CTRL1 … #define ADIN1300_AUTO_MDI_EN … #define ADIN1300_MAN_MDIX_EN … #define ADIN1300_DIAG_CLK_EN … #define ADIN1300_RX_ERR_CNT … #define ADIN1300_PHY_CTRL_STATUS2 … #define ADIN1300_NRG_PD_EN … #define ADIN1300_NRG_PD_TX_EN … #define ADIN1300_NRG_PD_STATUS … #define ADIN1300_PHY_CTRL2 … #define ADIN1300_DOWNSPEED_AN_100_EN … #define ADIN1300_DOWNSPEED_AN_10_EN … #define ADIN1300_GROUP_MDIO_EN … #define ADIN1300_DOWNSPEEDS_EN … #define ADIN1300_PHY_CTRL3 … #define ADIN1300_LINKING_EN … #define ADIN1300_DOWNSPEED_RETRIES_MSK … #define ADIN1300_INT_MASK_REG … #define ADIN1300_INT_MDIO_SYNC_EN … #define ADIN1300_INT_ANEG_STAT_CHNG_EN … #define ADIN1300_INT_ANEG_PAGE_RX_EN … #define ADIN1300_INT_IDLE_ERR_CNT_EN … #define ADIN1300_INT_MAC_FIFO_OU_EN … #define ADIN1300_INT_RX_STAT_CHNG_EN … #define ADIN1300_INT_LINK_STAT_CHNG_EN … #define ADIN1300_INT_SPEED_CHNG_EN … #define ADIN1300_INT_HW_IRQ_EN … #define ADIN1300_INT_MASK_EN … #define ADIN1300_INT_STATUS_REG … #define ADIN1300_PHY_STATUS1 … #define ADIN1300_PAIR_01_SWAP … /* EEE register addresses, accessible via Clause 22 access using * ADIN1300_MII_EXT_REG_PTR & ADIN1300_MII_EXT_REG_DATA. * The bit-fields are the same as specified by IEEE for EEE. */ #define ADIN1300_EEE_CAP_REG … #define ADIN1300_EEE_ADV_REG … #define ADIN1300_EEE_LPABLE_REG … #define ADIN1300_FLD_EN_REG … #define ADIN1300_FLD_PCS_ERR_100_EN … #define ADIN1300_FLD_PCS_ERR_1000_EN … #define ADIN1300_FLD_SLCR_OUT_STUCK_100_EN … #define ADIN1300_FLD_SLCR_OUT_STUCK_1000_EN … #define ADIN1300_FLD_SLCR_IN_ZDET_100_EN … #define ADIN1300_FLD_SLCR_IN_ZDET_1000_EN … #define ADIN1300_FLD_SLCR_IN_INVLD_100_EN … #define ADIN1300_FLD_SLCR_IN_INVLD_1000_EN … /* These bits are the ones which are enabled by default. */ #define ADIN1300_FLD_EN_ON … #define ADIN1300_CLOCK_STOP_REG … #define ADIN1300_LPI_WAKE_ERR_CNT_REG … #define ADIN1300_CDIAG_RUN … #define ADIN1300_CDIAG_RUN_EN … /* * The XSIM3/2/1 and XSHRT3/2/1 are actually relative. * For CDIAG_DTLD_RSLTS(0) it's ADIN1300_CDIAG_RSLT_XSIM3/2/1 * For CDIAG_DTLD_RSLTS(1) it's ADIN1300_CDIAG_RSLT_XSIM3/2/0 * For CDIAG_DTLD_RSLTS(2) it's ADIN1300_CDIAG_RSLT_XSIM3/1/0 * For CDIAG_DTLD_RSLTS(3) it's ADIN1300_CDIAG_RSLT_XSIM2/1/0 */ #define ADIN1300_CDIAG_DTLD_RSLTS(x) … #define ADIN1300_CDIAG_RSLT_BUSY … #define ADIN1300_CDIAG_RSLT_XSIM3 … #define ADIN1300_CDIAG_RSLT_XSIM2 … #define ADIN1300_CDIAG_RSLT_XSIM1 … #define ADIN1300_CDIAG_RSLT_SIM … #define ADIN1300_CDIAG_RSLT_XSHRT3 … #define ADIN1300_CDIAG_RSLT_XSHRT2 … #define ADIN1300_CDIAG_RSLT_XSHRT1 … #define ADIN1300_CDIAG_RSLT_SHRT … #define ADIN1300_CDIAG_RSLT_OPEN … #define ADIN1300_CDIAG_RSLT_GOOD … #define ADIN1300_CDIAG_FLT_DIST(x) … #define ADIN1300_GE_SOFT_RESET_REG … #define ADIN1300_GE_SOFT_RESET … #define ADIN1300_GE_CLK_CFG_REG … #define ADIN1300_GE_CLK_CFG_MASK … #define ADIN1300_GE_CLK_CFG_RCVR_125 … #define ADIN1300_GE_CLK_CFG_FREE_125 … #define ADIN1300_GE_CLK_CFG_REF_EN … #define ADIN1300_GE_CLK_CFG_HRT_RCVR … #define ADIN1300_GE_CLK_CFG_HRT_FREE … #define ADIN1300_GE_CLK_CFG_25 … #define ADIN1300_GE_RGMII_CFG_REG … #define ADIN1300_GE_RGMII_RX_MSK … #define ADIN1300_GE_RGMII_RX_SEL(x) … #define ADIN1300_GE_RGMII_GTX_MSK … #define ADIN1300_GE_RGMII_GTX_SEL(x) … #define ADIN1300_GE_RGMII_RXID_EN … #define ADIN1300_GE_RGMII_TXID_EN … #define ADIN1300_GE_RGMII_EN … /* RGMII internal delay settings for rx and tx for ADIN1300 */ #define ADIN1300_RGMII_1_60_NS … #define ADIN1300_RGMII_1_80_NS … #define ADIN1300_RGMII_2_00_NS … #define ADIN1300_RGMII_2_20_NS … #define ADIN1300_RGMII_2_40_NS … #define ADIN1300_GE_RMII_CFG_REG … #define ADIN1300_GE_RMII_FIFO_DEPTH_MSK … #define ADIN1300_GE_RMII_FIFO_DEPTH_SEL(x) … #define ADIN1300_GE_RMII_EN … /* RMII fifo depth values */ #define ADIN1300_RMII_4_BITS … #define ADIN1300_RMII_8_BITS … #define ADIN1300_RMII_12_BITS … #define ADIN1300_RMII_16_BITS … #define ADIN1300_RMII_20_BITS … #define ADIN1300_RMII_24_BITS … /** * struct adin_cfg_reg_map - map a config value to aregister value * @cfg: value in device configuration * @reg: value in the register */ struct adin_cfg_reg_map { … }; static const struct adin_cfg_reg_map adin_rgmii_delays[] = …; static const struct adin_cfg_reg_map adin_rmii_fifo_depths[] = …; /** * struct adin_clause45_mmd_map - map to convert Clause 45 regs to Clause 22 * @devad: device address used in Clause 45 access * @cl45_regnum: register address defined by Clause 45 * @adin_regnum: equivalent register address accessible via Clause 22 */ struct adin_clause45_mmd_map { … }; static const struct adin_clause45_mmd_map adin_clause45_mmd_map[] = …; struct adin_hw_stat { … }; static const struct adin_hw_stat adin_hw_stats[] = …; /** * struct adin_priv - ADIN PHY driver private data * @stats: statistic counters for the PHY */ struct adin_priv { … }; static int adin_lookup_reg_value(const struct adin_cfg_reg_map *tbl, int cfg) { … } static u32 adin_get_reg_value(struct phy_device *phydev, const char *prop_name, const struct adin_cfg_reg_map *tbl, u32 dflt) { … } static int adin_config_rgmii_mode(struct phy_device *phydev) { … } static int adin_config_rmii_mode(struct phy_device *phydev) { … } static int adin_get_downshift(struct phy_device *phydev, u8 *data) { … } static int adin_set_downshift(struct phy_device *phydev, u8 cnt) { … } static int adin_get_edpd(struct phy_device *phydev, u16 *tx_interval) { … } static int adin_set_edpd(struct phy_device *phydev, u16 tx_interval) { … } static int adin_get_fast_down(struct phy_device *phydev, u8 *msecs) { … } static int adin_set_fast_down(struct phy_device *phydev, const u8 *msecs) { … } static int adin_get_tunable(struct phy_device *phydev, struct ethtool_tunable *tuna, void *data) { … } static int adin_set_tunable(struct phy_device *phydev, struct ethtool_tunable *tuna, const void *data) { … } static int adin_config_clk_out(struct phy_device *phydev) { … } static int adin_config_init(struct phy_device *phydev) { … } static int adin_phy_ack_intr(struct phy_device *phydev) { … } static int adin_phy_config_intr(struct phy_device *phydev) { … } static irqreturn_t adin_phy_handle_interrupt(struct phy_device *phydev) { … } static int adin_cl45_to_adin_reg(struct phy_device *phydev, int devad, u16 cl45_regnum) { … } static int adin_read_mmd(struct phy_device *phydev, int devad, u16 regnum) { … } static int adin_write_mmd(struct phy_device *phydev, int devad, u16 regnum, u16 val) { … } static int adin_config_mdix(struct phy_device *phydev) { … } static int adin_config_aneg(struct phy_device *phydev) { … } static int adin_mdix_update(struct phy_device *phydev) { … } static int adin_read_status(struct phy_device *phydev) { … } static int adin_soft_reset(struct phy_device *phydev) { … } static int adin_get_sset_count(struct phy_device *phydev) { … } static void adin_get_strings(struct phy_device *phydev, u8 *data) { … } static int adin_read_mmd_stat_regs(struct phy_device *phydev, const struct adin_hw_stat *stat, u32 *val) { … } static u64 adin_get_stat(struct phy_device *phydev, int i) { … } static void adin_get_stats(struct phy_device *phydev, struct ethtool_stats *stats, u64 *data) { … } static int adin_probe(struct phy_device *phydev) { … } static int adin_cable_test_start(struct phy_device *phydev) { … } static int adin_cable_test_report_trans(int result) { … } static int adin_cable_test_report_pair(struct phy_device *phydev, unsigned int pair) { … } static int adin_cable_test_report(struct phy_device *phydev) { … } static int adin_cable_test_get_status(struct phy_device *phydev, bool *finished) { … } static struct phy_driver adin_driver[] = …; module_phy_driver(adin_driver); static struct mdio_device_id __maybe_unused adin_tbl[] = …; MODULE_DEVICE_TABLE(mdio, adin_tbl); MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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