/* SPDX-License-Identifier: GPL-2.0 */ #ifndef _LINUX_BRCMPHY_H #define _LINUX_BRCMPHY_H #include <linux/phy.h> /* All Broadcom Ethernet switches have a pseudo-PHY at address 30 which is used * to configure the switch internal registers via MDIO accesses. */ #define BRCM_PSEUDO_PHY_ADDR … #define PHY_ID_BCM50610 … #define PHY_ID_BCM50610M … #define PHY_ID_BCM5221 … #define PHY_ID_BCM5241 … #define PHY_ID_BCMAC131 … #define PHY_ID_BCM5481 … #define PHY_ID_BCM5395 … #define PHY_ID_BCM53125 … #define PHY_ID_BCM53128 … #define PHY_ID_BCM54810 … #define PHY_ID_BCM54811 … #define PHY_ID_BCM5482 … #define PHY_ID_BCM5411 … #define PHY_ID_BCM5421 … #define PHY_ID_BCM54210E … #define PHY_ID_BCM5464 … #define PHY_ID_BCM5461 … #define PHY_ID_BCM54612E … #define PHY_ID_BCM54616S … #define PHY_ID_BCM54140 … #define PHY_ID_BCM57780 … #define PHY_ID_BCM89610 … #define PHY_ID_BCM72113 … #define PHY_ID_BCM72116 … #define PHY_ID_BCM72165 … #define PHY_ID_BCM7250 … #define PHY_ID_BCM7255 … #define PHY_ID_BCM7260 … #define PHY_ID_BCM7268 … #define PHY_ID_BCM7271 … #define PHY_ID_BCM7278 … #define PHY_ID_BCM7364 … #define PHY_ID_BCM7366 … #define PHY_ID_BCM7346 … #define PHY_ID_BCM7362 … #define PHY_ID_BCM74165 … #define PHY_ID_BCM7425 … #define PHY_ID_BCM7429 … #define PHY_ID_BCM7435 … #define PHY_ID_BCM74371 … #define PHY_ID_BCM7439 … #define PHY_ID_BCM7439_2 … #define PHY_ID_BCM7445 … #define PHY_ID_BCM7712 … #define PHY_ID_BCM_CYGNUS … #define PHY_ID_BCM_OMEGA … #define PHY_BCM_OUI_MASK … #define PHY_BCM_OUI_1 … #define PHY_BCM_OUI_2 … #define PHY_BCM_OUI_3 … #define PHY_BCM_OUI_4 … #define PHY_BCM_OUI_5 … #define PHY_BCM_OUI_6 … #define PHY_BRCM_AUTO_PWRDWN_ENABLE … #define PHY_BRCM_RX_REFCLK_UNUSED … #define PHY_BRCM_CLEAR_RGMII_MODE … #define PHY_BRCM_DIS_TXCRXC_NOENRGY … #define PHY_BRCM_EN_MASTER_MODE … #define PHY_BRCM_IDDQ_SUSPEND … /* Broadcom BCM7xxx specific workarounds */ #define PHY_BRCM_7XXX_REV(x) … #define PHY_BRCM_7XXX_PATCH(x) … #define PHY_BCM_FLAGS_VALID … /* Broadcom BCM54XX register definitions, common to most Broadcom PHYs */ #define MII_BCM54XX_ECR … #define MII_BCM54XX_ECR_IM … #define MII_BCM54XX_ECR_IF … #define MII_BCM54XX_ECR_FIFOE … #define MII_BCM54XX_ESR … #define MII_BCM54XX_ESR_IS … #define MII_BCM54XX_EXP_DATA … #define MII_BCM54XX_EXP_SEL … #define MII_BCM54XX_EXP_SEL_TOP … #define MII_BCM54XX_EXP_SEL_SSD … #define MII_BCM54XX_EXP_SEL_WOL … #define MII_BCM54XX_EXP_SEL_ER … #define MII_BCM54XX_EXP_SEL_ETC … #define MII_BCM54XX_AUX_CTL … #define MII_BCM54XX_ISR … #define MII_BCM54XX_IMR … #define MII_BCM54XX_INT_CRCERR … #define MII_BCM54XX_INT_LINK … #define MII_BCM54XX_INT_SPEED … #define MII_BCM54XX_INT_DUPLEX … #define MII_BCM54XX_INT_LRS … #define MII_BCM54XX_INT_RRS … #define MII_BCM54XX_INT_SSERR … #define MII_BCM54XX_INT_UHCD … #define MII_BCM54XX_INT_NHCD … #define MII_BCM54XX_INT_NHCDL … #define MII_BCM54XX_INT_ANPR … #define MII_BCM54XX_INT_LC … #define MII_BCM54XX_INT_HC … #define MII_BCM54XX_INT_MDIX … #define MII_BCM54XX_INT_PSERR … #define MII_BCM54XX_SHD … #define MII_BCM54XX_SHD_WRITE … #define MII_BCM54XX_SHD_VAL(x) … #define MII_BCM54XX_SHD_DATA(x) … #define MII_BCM54XX_RDB_ADDR … #define MII_BCM54XX_RDB_DATA … /* legacy access control via rdb/expansion register */ #define BCM54XX_RDB_REG0087 … #define BCM54XX_EXP_REG7E … #define BCM54XX_ACCESS_MODE_LEGACY_EN … /* * AUXILIARY CONTROL SHADOW ACCESS REGISTERS. (PHY REG 0x18) */ #define MII_BCM54XX_AUXCTL_SHDWSEL_AUXCTL … #define MII_BCM54XX_AUXCTL_ACTL_TX_6DB … #define MII_BCM54XX_AUXCTL_ACTL_SMDSP_ENA … #define MII_BCM54XX_AUXCTL_ACTL_EXT_PKT_LEN … #define MII_BCM54XX_AUXCTL_SHDWSEL_MISC … #define MII_BCM54XX_AUXCTL_SHDWSEL_MISC_WIRESPEED_EN … #define MII_BCM54XX_AUXCTL_SHDWSEL_MISC_RGMII_EN … #define MII_BCM54XX_AUXCTL_SHDWSEL_MISC_RGMII_SKEW_EN … #define MII_BCM54XX_AUXCTL_MISC_FORCE_AMDIX … #define MII_BCM54XX_AUXCTL_MISC_WREN … #define MII_BCM54XX_AUXCTL_SHDWSEL_READ_SHIFT … #define MII_BCM54XX_AUXCTL_SHDWSEL_MASK … /* * Broadcom LED source encodings. These are used in BCM5461, BCM5481, * BCM5482, and possibly some others. */ #define BCM_LED_SRC_LINKSPD1 … #define BCM_LED_SRC_LINKSPD2 … #define BCM_LED_SRC_XMITLED … #define BCM_LED_SRC_ACTIVITYLED … #define BCM_LED_SRC_FDXLED … #define BCM_LED_SRC_SLAVE … #define BCM_LED_SRC_INTR … #define BCM_LED_SRC_QUALITY … #define BCM_LED_SRC_RCVLED … #define BCM_LED_SRC_WIRESPEED … #define BCM_LED_SRC_MULTICOLOR1 … #define BCM_LED_SRC_OPENSHORT … #define BCM_LED_SRC_OFF … #define BCM_LED_SRC_ON … #define BCM_LED_SRC_MASK … /* * Broadcom Multicolor LED configurations (expansion register 4) */ #define BCM_EXP_MULTICOLOR … #define BCM_LED_MULTICOLOR_IN_PHASE … #define BCM_LED_MULTICOLOR_LINK_ACT … #define BCM_LED_MULTICOLOR_SPEED … #define BCM_LED_MULTICOLOR_ACT_FLASH … #define BCM_LED_MULTICOLOR_FDX … #define BCM_LED_MULTICOLOR_OFF … #define BCM_LED_MULTICOLOR_ON … #define BCM_LED_MULTICOLOR_ALT … #define BCM_LED_MULTICOLOR_FLASH … #define BCM_LED_MULTICOLOR_LINK … #define BCM_LED_MULTICOLOR_ACT … #define BCM_LED_MULTICOLOR_PROGRAM … /* * BCM5482: Shadow registers * Shadow values go into bits [14:10] of register 0x1c to select a shadow * register to access. */ /* 00100: Reserved control register 2 */ #define BCM54XX_SHD_SCR2 … #define BCM54XX_SHD_SCR2_WSPD_RTRY_DIS … #define BCM54XX_SHD_SCR2_WSPD_RTRY_LMT_SHIFT … #define BCM54XX_SHD_SCR2_WSPD_RTRY_LMT_OFFSET … #define BCM54XX_SHD_SCR2_WSPD_RTRY_LMT_MASK … /* 00101: Spare Control Register 3 */ #define BCM54XX_SHD_SCR3 … #define BCM54XX_SHD_SCR3_DEF_CLK125 … #define BCM54XX_SHD_SCR3_DLLAPD_DIS … #define BCM54XX_SHD_SCR3_TRDDAPD … #define BCM54XX_SHD_SCR3_RXCTXC_DIS … /* 01010: Auto Power-Down */ #define BCM54XX_SHD_APD … #define BCM_APD_CLR_MASK … #define BCM54XX_SHD_APD_EN … #define BCM_NO_ANEG_APD_EN … #define BCM_APD_SINGLELP_EN … #define BCM54XX_SHD_LEDS1 … /* LED3 / ~LINKSPD[2] selector */ #define BCM54XX_SHD_LEDS_SHIFT(led) … #define BCM54XX_SHD_LEDS1_LED3(src) … /* LED1 / ~LINKSPD[1] selector */ #define BCM54XX_SHD_LEDS1_LED1(src) … #define BCM54XX_SHD_LEDS2 … #define BCM54XX_SHD_RGMII_MODE … #define BCM5482_SHD_SSD … #define BCM5482_SHD_SSD_LEDM … #define BCM5482_SHD_SSD_EN … /* 10011: SerDes 100-FX Control Register */ #define BCM54616S_SHD_100FX_CTRL … #define BCM54616S_100FX_MODE … /* 11111: Mode Control Register */ #define BCM54XX_SHD_MODE … #define BCM54XX_SHD_INTF_SEL_MASK … #define BCM54XX_SHD_INTF_SEL_RGMII … #define BCM54XX_SHD_INTF_SEL_SGMII … #define BCM54XX_SHD_INTF_SEL_GBIC … #define BCM54XX_SHD_MODE_1000BX … /* * EXPANSION SHADOW ACCESS REGISTERS. (PHY REG 0x15, 0x16, and 0x17) */ #define MII_BCM54XX_EXP_AADJ1CH0 … #define MII_BCM54XX_EXP_AADJ1CH0_SWP_ABCD_OEN … #define MII_BCM54XX_EXP_AADJ1CH0_SWSEL_THPF … #define MII_BCM54XX_EXP_AADJ1CH3 … #define MII_BCM54XX_EXP_AADJ1CH3_ADCCKADJ … #define MII_BCM54XX_EXP_EXP08 … #define MII_BCM54XX_EXP_EXP08_RJCT_2MHZ … #define MII_BCM54XX_EXP_EXP08_EARLY_DAC_WAKE … #define MII_BCM54XX_EXP_EXP08_FORCE_DAC_WAKE … #define MII_BCM54XX_EXP_EXP75 … #define MII_BCM54XX_EXP_EXP75_VDACCTRL … #define MII_BCM54XX_EXP_EXP75_CM_OSC … #define MII_BCM54XX_EXP_EXP96 … #define MII_BCM54XX_EXP_EXP96_MYST … #define MII_BCM54XX_EXP_EXP97 … #define MII_BCM54XX_EXP_EXP97_MYST … /* Top-MISC expansion registers */ #define BCM54XX_TOP_MISC_IDDQ_CTRL … #define BCM54XX_TOP_MISC_IDDQ_LP … #define BCM54XX_TOP_MISC_IDDQ_SD … #define BCM54XX_TOP_MISC_IDDQ_SR … #define BCM54XX_TOP_MISC_LED_CTL … #define BCM54XX_LED4_SEL_INTR … /* * BCM5482: Secondary SerDes registers */ #define BCM5482_SSD_1000BX_CTL … #define BCM5482_SSD_1000BX_CTL_PWRDOWN … #define BCM5482_SSD_SGMII_SLAVE … #define BCM5482_SSD_SGMII_SLAVE_EN … #define BCM5482_SSD_SGMII_SLAVE_AD … /* BroadR-Reach LRE Registers. */ #define MII_BCM54XX_LRECR … #define MII_BCM54XX_LRESR … #define MII_BCM54XX_LREPHYSID1 … #define MII_BCM54XX_LREPHYSID2 … #define MII_BCM54XX_LREANAA … #define MII_BCM54XX_LREANAC … #define MII_BCM54XX_LREANPT … #define MII_BCM54XX_LRELPA … #define MII_BCM54XX_LRELPNPM … #define MII_BCM54XX_LRELPNPC … #define MII_BCM54XX_LRELDSE … #define MII_BCM54XX_LREES … /* LRE control register. */ #define LRECR_RESET … #define LRECR_LOOPBACK … #define LRECR_LDSRES … #define LRECR_LDSEN … #define LRECR_PDOWN … #define LRECR_ISOLATE … #define LRECR_SPEED100 … #define LRECR_SPEED10 … #define LRECR_4PAIRS … #define LRECR_2PAIRS … #define LRECR_1PAIR … #define LRECR_MASTER … #define LRECR_SLAVE … /* LRE status register. */ #define LRESR_100_1PAIR … #define LRESR_100_4PAIR … #define LRESR_100_2PAIR … #define LRESR_10_2PAIR … #define LRESR_10_1PAIR … #define LRESR_ESTATEN … #define LRESR_RESV … #define LRESR_MFPS … #define LRESR_LDSCOMPLETE … #define LRESR_8023 … #define LRESR_LDSABILITY … #define LRESR_LSTATUS … #define LRESR_JCD … #define LRESR_ERCAP … /* LDS Auto-Negotiation Advertised Ability. */ #define LREANAA_PAUSE_ASYM … #define LREANAA_PAUSE … #define LREANAA_100_1PAIR … #define LREANAA_100_4PAIR … #define LREANAA_100_2PAIR … #define LREANAA_10_2PAIR … #define LREANAA_10_1PAIR … #define LRE_ADVERTISE_FULL … #define LRE_ADVERTISE_ALL … /* LDS Link Partner Ability. */ #define LRELPA_PAUSE_ASYM … #define LRELPA_PAUSE … #define LRELPA_100_1PAIR … #define LRELPA_100_4PAIR … #define LRELPA_100_2PAIR … #define LRELPA_10_2PAIR … #define LRELPA_10_1PAIR … /* LDS Expansion register. */ #define LDSE_DOWNGRADE … #define LDSE_MASTER … #define LDSE_PAIRS_MASK … #define LDSE_PAIRS_SHIFT … #define LDSE_4PAIRS … #define LDSE_2PAIRS … #define LDSE_1PAIR … #define LDSE_CABLEN_MASK … /* BCM54810 Registers */ #define BCM54810_EXP_BROADREACH_LRE_MISC_CTL … #define BCM54810_EXP_BROADREACH_LRE_MISC_CTL_EN … #define BCM54810_SHD_CLK_CTL … #define BCM54810_SHD_CLK_CTL_GTXCLK_EN … /* BCM54811 Registers */ #define BCM54811_EXP_BROADREACH_LRE_OVERLAY_CTL … /* Access Control Override Enable */ #define BCM54811_EXP_BROADREACH_LRE_OVERLAY_CTL_EN … /* Access Control Override Value */ #define BCM54811_EXP_BROADREACH_LRE_OVERLAY_CTL_OVERRIDE_VAL … /* Access Control Value */ #define BCM54811_EXP_BROADREACH_LRE_OVERLAY_CTL_VAL … /* BCM54612E Registers */ #define BCM54612E_EXP_SPARE0 … #define BCM54612E_LED4_CLK125OUT_EN … /* Wake-on-LAN registers */ #define BCM54XX_WOL_MAIN_CTL … #define BCM54XX_WOL_EN … #define BCM54XX_WOL_MODE_SINGLE_MPD … #define BCM54XX_WOL_MODE_SINGLE_MPDSEC … #define BCM54XX_WOL_MODE_DUAL … #define BCM54XX_WOL_MODE_SHIFT … #define BCM54XX_WOL_MODE_MASK … #define BCM54XX_WOL_MP_MSB_FF_EN … #define BCM54XX_WOL_SECKEY_OPT_4B … #define BCM54XX_WOL_SECKEY_OPT_6B … #define BCM54XX_WOL_SECKEY_OPT_8B … #define BCM54XX_WOL_SECKEY_OPT_SHIFT … #define BCM54XX_WOL_SECKEY_OPT_MASK … #define BCM54XX_WOL_L2_TYPE_CHK … #define BCM54XX_WOL_L4IPV4UDP_CHK … #define BCM54XX_WOL_L4IPV6UDP_CHK … #define BCM54XX_WOL_UDPPORT_CHK … #define BCM54XX_WOL_CRC_CHK … #define BCM54XX_WOL_SECKEY_MODE … #define BCM54XX_WOL_RST … #define BCM54XX_WOL_DIR_PKT_EN … #define BCM54XX_WOL_MASK_MODE_DA_FF … #define BCM54XX_WOL_MASK_MODE_DA_MPD … #define BCM54XX_WOL_MASK_MODE_DA_ONLY … #define BCM54XX_WOL_MASK_MODE_MPD … #define BCM54XX_WOL_MASK_MODE_SHIFT … #define BCM54XX_WOL_MASK_MODE_MASK … #define BCM54XX_WOL_INNER_PROTO … #define BCM54XX_WOL_OUTER_PROTO … #define BCM54XX_WOL_OUTER_PROTO2 … #define BCM54XX_WOL_MPD_DATA1(x) … #define BCM54XX_WOL_MPD_DATA2(x) … #define BCM54XX_WOL_SEC_KEY_8B … #define BCM54XX_WOL_MASK(x) … #define BCM54XX_SEC_KEY_STORE(x) … #define BCM54XX_WOL_SHARED_CNT … #define BCM54XX_WOL_INT_MASK … #define BCM54XX_WOL_PKT1 … #define BCM54XX_WOL_PKT2 … #define BCM54XX_WOL_DIR … #define BCM54XX_WOL_ALL_INTRS … #define BCM54XX_WOL_INT_STATUS … /* BCM5221 Registers */ #define BCM5221_AEGSR … #define BCM5221_AEGSR_MDIX_STATUS … #define BCM5221_AEGSR_MDIX_MAN_SWAP … #define BCM5221_AEGSR_MDIX_DIS … #define BCM5221_SHDW_AM4_EN_CLK_LPM … #define BCM5221_SHDW_AM4_FORCE_LPM … /*****************************************************************************/ /* Fast Ethernet Transceiver definitions. */ /*****************************************************************************/ #define MII_BRCM_FET_INTREG … #define MII_BRCM_FET_IR_MASK … #define MII_BRCM_FET_IR_LINK_EN … #define MII_BRCM_FET_IR_SPEED_EN … #define MII_BRCM_FET_IR_DUPLEX_EN … #define MII_BRCM_FET_IR_ENABLE … #define MII_BRCM_FET_BRCMTEST … #define MII_BRCM_FET_BT_SRE … /*** Shadow register definitions ***/ #define MII_BRCM_FET_SHDW_MISCCTRL … #define MII_BRCM_FET_SHDW_MC_FAME … #define MII_BRCM_FET_SHDW_AUXMODE4 … #define MII_BRCM_FET_SHDW_AM4_STANDBY … #define MII_BRCM_FET_SHDW_AM4_LED_MASK … #define MII_BRCM_FET_SHDW_AM4_LED_MODE1 … #define MII_BRCM_FET_SHDW_AUXSTAT2 … #define MII_BRCM_FET_SHDW_AS2_APDE … #define BRCM_CL45VEN_EEE_CONTROL … #define LPI_FEATURE_EN … #define LPI_FEATURE_EN_DIG1000X … #define BRCM_CL45VEN_EEE_LPI_CNT … /* Core register definitions*/ #define MII_BRCM_CORE_BASE12 … #define MII_BRCM_CORE_BASE13 … #define MII_BRCM_CORE_BASE14 … #define MII_BRCM_CORE_BASE1E … #define MII_BRCM_CORE_EXPB0 … #define MII_BRCM_CORE_EXPB1 … /* Enhanced Cable Diagnostics */ #define BCM54XX_RDB_ECD_CTRL … #define BCM54XX_EXP_ECD_CTRL … #define BCM54XX_ECD_CTRL_CABLE_TYPE_CAT3 … #define BCM54XX_ECD_CTRL_CABLE_TYPE_CAT5 … #define BCM54XX_ECD_CTRL_CABLE_TYPE_MASK … #define BCM54XX_ECD_CTRL_INVALID … #define BCM54XX_ECD_CTRL_UNIT_CM … #define BCM54XX_ECD_CTRL_UNIT_M … #define BCM54XX_ECD_CTRL_UNIT_MASK … #define BCM54XX_ECD_CTRL_IN_PROGRESS … #define BCM54XX_ECD_CTRL_BREAK_LINK … #define BCM54XX_ECD_CTRL_CROSS_SHORT_DIS … #define BCM54XX_ECD_CTRL_RUN … #define BCM54XX_RDB_ECD_FAULT_TYPE … #define BCM54XX_EXP_ECD_FAULT_TYPE … #define BCM54XX_ECD_FAULT_TYPE_INVALID … #define BCM54XX_ECD_FAULT_TYPE_OK … #define BCM54XX_ECD_FAULT_TYPE_OPEN … #define BCM54XX_ECD_FAULT_TYPE_SAME_SHORT … #define BCM54XX_ECD_FAULT_TYPE_CROSS_SHORT … #define BCM54XX_ECD_FAULT_TYPE_BUSY … #define BCM54XX_ECD_FAULT_TYPE_PAIR_D_MASK … #define BCM54XX_ECD_FAULT_TYPE_PAIR_C_MASK … #define BCM54XX_ECD_FAULT_TYPE_PAIR_B_MASK … #define BCM54XX_ECD_FAULT_TYPE_PAIR_A_MASK … #define BCM54XX_ECD_PAIR_A_LENGTH_RESULTS … #define BCM54XX_ECD_PAIR_B_LENGTH_RESULTS … #define BCM54XX_ECD_PAIR_C_LENGTH_RESULTS … #define BCM54XX_ECD_PAIR_D_LENGTH_RESULTS … #define BCM54XX_RDB_ECD_PAIR_A_LENGTH_RESULTS … #define BCM54XX_EXP_ECD_PAIR_A_LENGTH_RESULTS … #define BCM54XX_RDB_ECD_PAIR_B_LENGTH_RESULTS … #define BCM54XX_EXP_ECD_PAIR_B_LENGTH_RESULTS … #define BCM54XX_RDB_ECD_PAIR_C_LENGTH_RESULTS … #define BCM54XX_EXP_ECD_PAIR_C_LENGTH_RESULTS … #define BCM54XX_RDB_ECD_PAIR_D_LENGTH_RESULTS … #define BCM54XX_EXP_ECD_PAIR_D_LENGTH_RESULTS … #define BCM54XX_ECD_LENGTH_RESULTS_INVALID … #endif /* _LINUX_BRCMPHY_H */
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