// SPDX-License-Identifier: GPL-2.0+ /* Broadcom BCM54140 Quad SGMII/QSGMII Copper/Fiber Gigabit PHY * * Copyright (c) 2020 Michael Walle <[email protected]> */ #include <linux/bitfield.h> #include <linux/brcmphy.h> #include <linux/hwmon.h> #include <linux/module.h> #include <linux/phy.h> #include "bcm-phy-lib.h" /* RDB per-port registers */ #define BCM54140_RDB_ISR … #define BCM54140_RDB_IMR … #define BCM54140_RDB_INT_LINK … #define BCM54140_RDB_INT_SPEED … #define BCM54140_RDB_INT_DUPLEX … #define BCM54140_RDB_SPARE1 … #define BCM54140_RDB_SPARE1_LSLM … #define BCM54140_RDB_SPARE2 … #define BCM54140_RDB_SPARE2_WS_RTRY_DIS … #define BCM54140_RDB_SPARE2_WS_RTRY_LIMIT … #define BCM54140_RDB_SPARE3 … #define BCM54140_RDB_SPARE3_BIT0 … #define BCM54140_RDB_LED_CTRL … #define BCM54140_RDB_LED_CTRL_ACTLINK0 … #define BCM54140_RDB_LED_CTRL_ACTLINK1 … #define BCM54140_RDB_C_APWR … #define BCM54140_RDB_C_APWR_SINGLE_PULSE … #define BCM54140_RDB_C_APWR_APD_MODE_DIS … #define BCM54140_RDB_C_APWR_APD_MODE_EN … #define BCM54140_RDB_C_APWR_APD_MODE_DIS2 … #define BCM54140_RDB_C_APWR_APD_MODE_EN_ANEG … #define BCM54140_RDB_C_APWR_APD_MODE_MASK … #define BCM54140_RDB_C_APWR_SLP_TIM_MASK … #define BCM54140_RDB_C_APWR_SLP_TIM_2_7 … #define BCM54140_RDB_C_APWR_SLP_TIM_5_4 … #define BCM54140_RDB_C_PWR … #define BCM54140_RDB_C_PWR_ISOLATE … #define BCM54140_RDB_C_MISC_CTRL … #define BCM54140_RDB_C_MISC_CTRL_WS_EN … /* RDB global registers */ #define BCM54140_RDB_TOP_IMR … #define BCM54140_RDB_TOP_IMR_PORT0 … #define BCM54140_RDB_TOP_IMR_PORT1 … #define BCM54140_RDB_TOP_IMR_PORT2 … #define BCM54140_RDB_TOP_IMR_PORT3 … #define BCM54140_RDB_MON_CTRL … #define BCM54140_RDB_MON_CTRL_V_MODE … #define BCM54140_RDB_MON_CTRL_SEL_MASK … #define BCM54140_RDB_MON_CTRL_SEL_TEMP … #define BCM54140_RDB_MON_CTRL_SEL_1V0 … #define BCM54140_RDB_MON_CTRL_SEL_3V3 … #define BCM54140_RDB_MON_CTRL_SEL_RR … #define BCM54140_RDB_MON_CTRL_PWR_DOWN … #define BCM54140_RDB_MON_TEMP_VAL … #define BCM54140_RDB_MON_TEMP_MAX … #define BCM54140_RDB_MON_TEMP_MIN … #define BCM54140_RDB_MON_TEMP_DATA_MASK … #define BCM54140_RDB_MON_1V0_VAL … #define BCM54140_RDB_MON_1V0_MAX … #define BCM54140_RDB_MON_1V0_MIN … #define BCM54140_RDB_MON_1V0_DATA_MASK … #define BCM54140_RDB_MON_3V3_VAL … #define BCM54140_RDB_MON_3V3_MAX … #define BCM54140_RDB_MON_3V3_MIN … #define BCM54140_RDB_MON_3V3_DATA_MASK … #define BCM54140_RDB_MON_ISR … #define BCM54140_RDB_MON_ISR_3V3 … #define BCM54140_RDB_MON_ISR_1V0 … #define BCM54140_RDB_MON_ISR_TEMP … /* According to the datasheet the formula is: * T = 413.35 - (0.49055 * bits[9:0]) */ #define BCM54140_HWMON_TO_TEMP(v) … #define BCM54140_HWMON_FROM_TEMP(v) … /* According to the datasheet the formula is: * U = bits[11:0] / 1024 * 220 / 0.2 * * Normalized: * U = bits[11:0] / 4096 * 2514 */ #define BCM54140_HWMON_TO_IN_1V0(v) … #define BCM54140_HWMON_FROM_IN_1V0(v) … /* According to the datasheet the formula is: * U = bits[10:0] / 1024 * 880 / 0.7 * * Normalized: * U = bits[10:0] / 2048 * 4400 */ #define BCM54140_HWMON_TO_IN_3V3(v) … #define BCM54140_HWMON_FROM_IN_3V3(v) … #define BCM54140_HWMON_TO_IN(ch, v) … #define BCM54140_HWMON_FROM_IN(ch, v) … #define BCM54140_HWMON_IN_MASK(ch) … #define BCM54140_HWMON_IN_VAL_REG(ch) … #define BCM54140_HWMON_IN_MIN_REG(ch) … #define BCM54140_HWMON_IN_MAX_REG(ch) … #define BCM54140_HWMON_IN_ALARM_BIT(ch) … /* This PHY has two different PHY IDs depening on its MODE_SEL pin. This * pin choses between 4x SGMII and QSGMII mode: * AE02_5009 4x SGMII * AE02_5019 QSGMII */ #define BCM54140_PHY_ID_MASK … #define BCM54140_PHY_ID_REV(phy_id) … #define BCM54140_REV_B0 … #define BCM54140_DEFAULT_DOWNSHIFT … #define BCM54140_MAX_DOWNSHIFT … enum bcm54140_global_phy { … }; struct bcm54140_priv { … }; #if IS_ENABLED(CONFIG_HWMON) static umode_t bcm54140_hwmon_is_visible(const void *data, enum hwmon_sensor_types type, u32 attr, int channel) { … } static int bcm54140_hwmon_read_alarm(struct device *dev, unsigned int bit, long *val) { … } static int bcm54140_hwmon_read_temp(struct device *dev, u32 attr, long *val) { … } static int bcm54140_hwmon_read_in(struct device *dev, u32 attr, int channel, long *val) { … } static int bcm54140_hwmon_read(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long *val) { … } static const char *const bcm54140_hwmon_in_labels[] = …; static int bcm54140_hwmon_read_string(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, const char **str) { … } static int bcm54140_hwmon_write_temp(struct device *dev, u32 attr, int channel, long val) { … } static int bcm54140_hwmon_write_in(struct device *dev, u32 attr, int channel, long val) { … } static int bcm54140_hwmon_write(struct device *dev, enum hwmon_sensor_types type, u32 attr, int channel, long val) { … } static const struct hwmon_channel_info * const bcm54140_hwmon_info[] = …; static const struct hwmon_ops bcm54140_hwmon_ops = …; static const struct hwmon_chip_info bcm54140_chip_info = …; static int bcm54140_enable_monitoring(struct phy_device *phydev) { … } static int bcm54140_probe_once(struct phy_device *phydev) { … } #endif static int bcm54140_base_read_rdb(struct phy_device *phydev, u16 rdb) { … } static int bcm54140_base_write_rdb(struct phy_device *phydev, u16 rdb, u16 val) { … } /* Under some circumstances a core PLL may not lock, this will then prevent * a successful link establishment. Restart the PLL after the voltages are * stable to workaround this issue. */ static int bcm54140_b0_workaround(struct phy_device *phydev) { … } /* The BCM54140 is a quad PHY where only the first port has access to the * global register. Thus we need to find out its PHY address. * */ static int bcm54140_get_base_addr_and_port(struct phy_device *phydev) { … } static int bcm54140_probe(struct phy_device *phydev) { … } static int bcm54140_config_init(struct phy_device *phydev) { … } static irqreturn_t bcm54140_handle_interrupt(struct phy_device *phydev) { … } static int bcm54140_ack_intr(struct phy_device *phydev) { … } static int bcm54140_config_intr(struct phy_device *phydev) { … } static int bcm54140_get_downshift(struct phy_device *phydev, u8 *data) { … } static int bcm54140_set_downshift(struct phy_device *phydev, u8 cnt) { … } static int bcm54140_get_edpd(struct phy_device *phydev, u16 *tx_interval) { … } static int bcm54140_set_edpd(struct phy_device *phydev, u16 tx_interval) { … } static int bcm54140_get_tunable(struct phy_device *phydev, struct ethtool_tunable *tuna, void *data) { … } static int bcm54140_set_tunable(struct phy_device *phydev, struct ethtool_tunable *tuna, const void *data) { … } static struct phy_driver bcm54140_drivers[] = …; module_phy_driver(bcm54140_drivers); static struct mdio_device_id __maybe_unused bcm54140_tbl[] = …; MODULE_AUTHOR(…) …; MODULE_DESCRIPTION(…) …; MODULE_DEVICE_TABLE(mdio, bcm54140_tbl); MODULE_LICENSE(…) …;
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