/* SPDX-License-Identifier: GPL-2.0-only OR MIT */ /* * Device Tree constants for the Texas Instruments DP83869 PHY * * Author: Dan Murphy <[email protected]> * * Copyright (C) 2015-2024 Texas Instruments Incorporated - https://www.ti.com/ */ #ifndef _DT_BINDINGS_TI_DP83869_H #define _DT_BINDINGS_TI_DP83869_H /* PHY CTRL bits */ #define DP83869_PHYCR_FIFO_DEPTH_3_B_NIB … #define DP83869_PHYCR_FIFO_DEPTH_4_B_NIB … #define DP83869_PHYCR_FIFO_DEPTH_6_B_NIB … #define DP83869_PHYCR_FIFO_DEPTH_8_B_NIB … /* IO_MUX_CFG - Clock output selection */ #define DP83869_CLK_O_SEL_CHN_A_RCLK … #define DP83869_CLK_O_SEL_CHN_B_RCLK … #define DP83869_CLK_O_SEL_CHN_C_RCLK … #define DP83869_CLK_O_SEL_CHN_D_RCLK … #define DP83869_CLK_O_SEL_CHN_A_RCLK_DIV5 … #define DP83869_CLK_O_SEL_CHN_B_RCLK_DIV5 … #define DP83869_CLK_O_SEL_CHN_C_RCLK_DIV5 … #define DP83869_CLK_O_SEL_CHN_D_RCLK_DIV5 … #define DP83869_CLK_O_SEL_CHN_A_TCLK … #define DP83869_CLK_O_SEL_CHN_B_TCLK … #define DP83869_CLK_O_SEL_CHN_C_TCLK … #define DP83869_CLK_O_SEL_CHN_D_TCLK … #define DP83869_CLK_O_SEL_REF_CLK … #define DP83869_RGMII_COPPER_ETHERNET … #define DP83869_RGMII_1000_BASE … #define DP83869_RGMII_100_BASE … #define DP83869_RGMII_SGMII_BRIDGE … #define DP83869_1000M_MEDIA_CONVERT … #define DP83869_100M_MEDIA_CONVERT … #define DP83869_SGMII_COPPER_ETHERNET … #endif
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