linux/drivers/net/phy/icplus.c

// SPDX-License-Identifier: GPL-2.0+
/*
 * Driver for ICPlus PHYs
 *
 * Copyright (c) 2007 Freescale Semiconductor, Inc.
 */
#include <linux/kernel.h>
#include <linux/string.h>
#include <linux/errno.h>
#include <linux/unistd.h>
#include <linux/interrupt.h>
#include <linux/init.h>
#include <linux/delay.h>
#include <linux/netdevice.h>
#include <linux/etherdevice.h>
#include <linux/skbuff.h>
#include <linux/spinlock.h>
#include <linux/mm.h>
#include <linux/module.h>
#include <linux/mii.h>
#include <linux/ethtool.h>
#include <linux/phy.h>
#include <linux/property.h>

#include <asm/io.h>
#include <asm/irq.h>
#include <linux/uaccess.h>

MODULE_DESCRIPTION();
MODULE_AUTHOR();
MODULE_LICENSE();

/* IP101A/G - IP1001 */
#define IP10XX_SPEC_CTRL_STATUS
#define IP1001_RXPHASE_SEL
#define IP1001_TXPHASE_SEL
#define IP1001_SPEC_CTRL_STATUS_2
#define IP1001_APS_ON
#define IP101A_G_APS_ON
#define IP101A_G_AUTO_MDIX_DIS
#define IP101A_G_IRQ_CONF_STATUS
#define IP101A_G_IRQ_PIN_USED
#define IP101A_G_IRQ_ALL_MASK
#define IP101A_G_IRQ_SPEED_CHANGE
#define IP101A_G_IRQ_DUPLEX_CHANGE
#define IP101A_G_IRQ_LINK_CHANGE
#define IP101A_G_PHY_STATUS
#define IP101A_G_MDIX
#define IP101A_G_PHY_SPEC_CTRL
#define IP101A_G_FORCE_MDIX

#define IP101G_PAGE_CONTROL
#define IP101G_PAGE_CONTROL_MASK
#define IP101G_DIGITAL_IO_SPEC_CTRL
#define IP101G_DIGITAL_IO_SPEC_CTRL_SEL_INTR32

#define IP101G_DEFAULT_PAGE

#define IP101G_P1_CNT_CTRL
#define CNT_CTRL_RX_EN
#define IP101G_P8_CNT_CTRL
#define CNT_CTRL_RDCLR_EN
#define IP101G_CNT_REG

#define IP175C_PHY_ID
#define IP1001_PHY_ID
#define IP101A_PHY_ID

/* The 32-pin IP101GR package can re-configure the mode of the RXER/INTR_32 pin
 * (pin number 21). The hardware default is RXER (receive error) mode. But it
 * can be configured to interrupt mode manually.
 */
enum ip101gr_sel_intr32 {};

struct ip101g_hw_stat {};

static struct ip101g_hw_stat ip101g_hw_stats[] =;

struct ip101a_g_phy_priv {};

static int ip175c_config_init(struct phy_device *phydev)
{}

static int ip1001_config_init(struct phy_device *phydev)
{}

static int ip175c_read_status(struct phy_device *phydev)
{}

static int ip175c_config_aneg(struct phy_device *phydev)
{}

static int ip101a_g_probe(struct phy_device *phydev)
{}

static int ip101a_g_config_intr_pin(struct phy_device *phydev)
{}

static int ip101a_config_init(struct phy_device *phydev)
{}

static int ip101g_config_init(struct phy_device *phydev)
{}

static int ip101a_g_read_status(struct phy_device *phydev)
{}

static int ip101a_g_config_mdix(struct phy_device *phydev)
{}

static int ip101a_g_config_aneg(struct phy_device *phydev)
{}

static int ip101a_g_ack_interrupt(struct phy_device *phydev)
{}

static int ip101a_g_config_intr(struct phy_device *phydev)
{}

static irqreturn_t ip101a_g_handle_interrupt(struct phy_device *phydev)
{}

/* The IP101A doesn't really have a page register. We just pretend to have one
 * so we can use the paged versions of the callbacks of the IP101G.
 */
static int ip101a_read_page(struct phy_device *phydev)
{}

static int ip101a_write_page(struct phy_device *phydev, int page)
{}

static int ip101g_read_page(struct phy_device *phydev)
{}

static int ip101g_write_page(struct phy_device *phydev, int page)
{}

static int ip101a_g_has_page_register(struct phy_device *phydev)
{}

static int ip101a_g_match_phy_device(struct phy_device *phydev, bool ip101a)
{}

static int ip101a_match_phy_device(struct phy_device *phydev)
{}

static int ip101g_match_phy_device(struct phy_device *phydev)
{}

static int ip101g_get_sset_count(struct phy_device *phydev)
{}

static void ip101g_get_strings(struct phy_device *phydev, u8 *data)
{}

static u64 ip101g_get_stat(struct phy_device *phydev, int i)
{}

static void ip101g_get_stats(struct phy_device *phydev,
			     struct ethtool_stats *stats, u64 *data)
{}

static struct phy_driver icplus_driver[] =;

module_phy_driver(icplus_driver);

static struct mdio_device_id __maybe_unused icplus_tbl[] =;

MODULE_DEVICE_TABLE(mdio, icplus_tbl);