// SPDX-License-Identifier: GPL-2.0+ /* * drivers/net/phy/micrel.c * * Driver for Micrel PHYs * * Author: David J. Choi * * Copyright (c) 2010-2013 Micrel, Inc. * Copyright (c) 2014 Johan Hovold <[email protected]> * * Support : Micrel Phys: * Giga phys: ksz9021, ksz9031, ksz9131, lan8841, lan8814 * 100/10 Phys : ksz8001, ksz8721, ksz8737, ksz8041 * ksz8021, ksz8031, ksz8051, * ksz8081, ksz8091, * ksz8061, * Switch : ksz8873, ksz886x * ksz9477, lan8804 */ #include <linux/bitfield.h> #include <linux/ethtool_netlink.h> #include <linux/kernel.h> #include <linux/module.h> #include <linux/phy.h> #include <linux/micrel_phy.h> #include <linux/of.h> #include <linux/clk.h> #include <linux/delay.h> #include <linux/ptp_clock_kernel.h> #include <linux/ptp_clock.h> #include <linux/ptp_classify.h> #include <linux/net_tstamp.h> #include <linux/gpio/consumer.h> /* Operation Mode Strap Override */ #define MII_KSZPHY_OMSO … #define KSZPHY_OMSO_FACTORY_TEST … #define KSZPHY_OMSO_B_CAST_OFF … #define KSZPHY_OMSO_NAND_TREE_ON … #define KSZPHY_OMSO_RMII_OVERRIDE … #define KSZPHY_OMSO_MII_OVERRIDE … /* general Interrupt control/status reg in vendor specific block. */ #define MII_KSZPHY_INTCS … #define KSZPHY_INTCS_JABBER … #define KSZPHY_INTCS_RECEIVE_ERR … #define KSZPHY_INTCS_PAGE_RECEIVE … #define KSZPHY_INTCS_PARELLEL … #define KSZPHY_INTCS_LINK_PARTNER_ACK … #define KSZPHY_INTCS_LINK_DOWN … #define KSZPHY_INTCS_REMOTE_FAULT … #define KSZPHY_INTCS_LINK_UP … #define KSZPHY_INTCS_ALL … #define KSZPHY_INTCS_LINK_DOWN_STATUS … #define KSZPHY_INTCS_LINK_UP_STATUS … #define KSZPHY_INTCS_STATUS … /* LinkMD Control/Status */ #define KSZ8081_LMD … #define KSZ8081_LMD_ENABLE_TEST … #define KSZ8081_LMD_STAT_NORMAL … #define KSZ8081_LMD_STAT_OPEN … #define KSZ8081_LMD_STAT_SHORT … #define KSZ8081_LMD_STAT_FAIL … #define KSZ8081_LMD_STAT_MASK … /* Short cable (<10 meter) has been detected by LinkMD */ #define KSZ8081_LMD_SHORT_INDICATOR … #define KSZ8081_LMD_DELTA_TIME_MASK … #define KSZ9x31_LMD … #define KSZ9x31_LMD_VCT_EN … #define KSZ9x31_LMD_VCT_DIS_TX … #define KSZ9x31_LMD_VCT_PAIR(n) … #define KSZ9x31_LMD_VCT_SEL_RESULT … #define KSZ9x31_LMD_VCT_SEL_THRES_HI … #define KSZ9x31_LMD_VCT_SEL_THRES_LO … #define KSZ9x31_LMD_VCT_SEL_MASK … #define KSZ9x31_LMD_VCT_ST_NORMAL … #define KSZ9x31_LMD_VCT_ST_OPEN … #define KSZ9x31_LMD_VCT_ST_SHORT … #define KSZ9x31_LMD_VCT_ST_FAIL … #define KSZ9x31_LMD_VCT_ST_MASK … #define KSZ9x31_LMD_VCT_DATA_REFLECTED_INVALID … #define KSZ9x31_LMD_VCT_DATA_SIG_WAIT_TOO_LONG … #define KSZ9x31_LMD_VCT_DATA_MASK100 … #define KSZ9x31_LMD_VCT_DATA_NLP_FLP … #define KSZ9x31_LMD_VCT_DATA_LO_PULSE_MASK … #define KSZ9x31_LMD_VCT_DATA_HI_PULSE_MASK … #define KSZ9x31_LMD_VCT_DATA_MASK … #define KSZPHY_WIRE_PAIR_MASK … #define LAN8814_CABLE_DIAG … #define LAN8814_CABLE_DIAG_STAT_MASK … #define LAN8814_CABLE_DIAG_VCT_DATA_MASK … #define LAN8814_PAIR_BIT_SHIFT … #define LAN8814_WIRE_PAIR_MASK … /* Lan8814 general Interrupt control/status reg in GPHY specific block. */ #define LAN8814_INTC … #define LAN8814_INTS … #define LAN8814_INT_LINK_DOWN … #define LAN8814_INT_LINK_UP … #define LAN8814_INT_LINK … #define LAN8814_INTR_CTRL_REG … #define LAN8814_INTR_CTRL_REG_POLARITY … #define LAN8814_INTR_CTRL_REG_INTR_ENABLE … #define LAN8814_EEE_STATE … #define LAN8814_EEE_STATE_MASK2P5P … #define LAN8814_PD_CONTROLS … #define LAN8814_PD_CONTROLS_PD_MEAS_TIME_MASK … #define LAN8814_PD_CONTROLS_PD_MEAS_TIME_VAL … /* Represents 1ppm adjustment in 2^32 format with * each nsec contains 4 clock cycles. * The value is calculated as following: (1/1000000)/((2^-32)/4) */ #define LAN8814_1PPM_FORMAT … /* Represents 1ppm adjustment in 2^32 format with * each nsec contains 8 clock cycles. * The value is calculated as following: (1/1000000)/((2^-32)/8) */ #define LAN8841_1PPM_FORMAT … #define PTP_RX_VERSION … #define PTP_TX_VERSION … #define PTP_MAX_VERSION(x) … #define PTP_MIN_VERSION(x) … #define PTP_RX_MOD … #define PTP_RX_MOD_BAD_UDPV4_CHKSUM_FORCE_FCS_DIS_ … #define PTP_RX_TIMESTAMP_EN … #define PTP_TX_TIMESTAMP_EN … #define PTP_TIMESTAMP_EN_SYNC_ … #define PTP_TIMESTAMP_EN_DREQ_ … #define PTP_TIMESTAMP_EN_PDREQ_ … #define PTP_TIMESTAMP_EN_PDRES_ … #define PTP_TX_PARSE_L2_ADDR_EN … #define PTP_RX_PARSE_L2_ADDR_EN … #define PTP_TX_PARSE_IP_ADDR_EN … #define PTP_RX_PARSE_IP_ADDR_EN … #define LTC_HARD_RESET … #define LTC_HARD_RESET_ … #define TSU_HARD_RESET … #define TSU_HARD_RESET_ … #define PTP_CMD_CTL … #define PTP_CMD_CTL_PTP_DISABLE_ … #define PTP_CMD_CTL_PTP_ENABLE_ … #define PTP_CMD_CTL_PTP_CLOCK_READ_ … #define PTP_CMD_CTL_PTP_CLOCK_LOAD_ … #define PTP_CMD_CTL_PTP_LTC_STEP_SEC_ … #define PTP_CMD_CTL_PTP_LTC_STEP_NSEC_ … #define PTP_COMMON_INT_ENA … #define PTP_COMMON_INT_ENA_GPIO_CAP_EN … #define PTP_CLOCK_SET_SEC_HI … #define PTP_CLOCK_SET_SEC_MID … #define PTP_CLOCK_SET_SEC_LO … #define PTP_CLOCK_SET_NS_HI … #define PTP_CLOCK_SET_NS_LO … #define PTP_CLOCK_READ_SEC_HI … #define PTP_CLOCK_READ_SEC_MID … #define PTP_CLOCK_READ_SEC_LO … #define PTP_CLOCK_READ_NS_HI … #define PTP_CLOCK_READ_NS_LO … #define PTP_GPIO_SEL … #define PTP_GPIO_SEL_GPIO_SEL(pin) … #define PTP_GPIO_CAP_MAP_LO … #define PTP_GPIO_CAP_EN … #define PTP_GPIO_CAP_EN_GPIO_RE_CAPTURE_ENABLE(gpio) … #define PTP_GPIO_CAP_EN_GPIO_FE_CAPTURE_ENABLE(gpio) … #define PTP_GPIO_RE_LTC_SEC_HI_CAP … #define PTP_GPIO_RE_LTC_SEC_LO_CAP … #define PTP_GPIO_RE_LTC_NS_HI_CAP … #define PTP_GPIO_RE_LTC_NS_LO_CAP … #define PTP_GPIO_FE_LTC_SEC_HI_CAP … #define PTP_GPIO_FE_LTC_SEC_LO_CAP … #define PTP_GPIO_FE_LTC_NS_HI_CAP … #define PTP_GPIO_FE_LTC_NS_LO_CAP … #define PTP_GPIO_CAP_STS … #define PTP_GPIO_CAP_STS_PTP_GPIO_RE_STS(gpio) … #define PTP_GPIO_CAP_STS_PTP_GPIO_FE_STS(gpio) … #define PTP_OPERATING_MODE … #define PTP_OPERATING_MODE_STANDALONE_ … #define PTP_TX_MOD … #define PTP_TX_MOD_TX_PTP_SYNC_TS_INSERT_ … #define PTP_TX_MOD_BAD_UDPV4_CHKSUM_FORCE_FCS_DIS_ … #define PTP_RX_PARSE_CONFIG … #define PTP_RX_PARSE_CONFIG_LAYER2_EN_ … #define PTP_RX_PARSE_CONFIG_IPV4_EN_ … #define PTP_RX_PARSE_CONFIG_IPV6_EN_ … #define PTP_TX_PARSE_CONFIG … #define PTP_TX_PARSE_CONFIG_LAYER2_EN_ … #define PTP_TX_PARSE_CONFIG_IPV4_EN_ … #define PTP_TX_PARSE_CONFIG_IPV6_EN_ … #define PTP_CLOCK_RATE_ADJ_HI … #define PTP_CLOCK_RATE_ADJ_LO … #define PTP_CLOCK_RATE_ADJ_DIR_ … #define PTP_LTC_STEP_ADJ_HI … #define PTP_LTC_STEP_ADJ_LO … #define PTP_LTC_STEP_ADJ_DIR_ … #define LAN8814_INTR_STS_REG … #define LAN8814_INTR_STS_REG_1588_TSU0_ … #define LAN8814_INTR_STS_REG_1588_TSU1_ … #define LAN8814_INTR_STS_REG_1588_TSU2_ … #define LAN8814_INTR_STS_REG_1588_TSU3_ … #define PTP_CAP_INFO … #define PTP_CAP_INFO_TX_TS_CNT_GET_(reg_val) … #define PTP_CAP_INFO_RX_TS_CNT_GET_(reg_val) … #define PTP_TX_EGRESS_SEC_HI … #define PTP_TX_EGRESS_SEC_LO … #define PTP_TX_EGRESS_NS_HI … #define PTP_TX_EGRESS_NS_LO … #define PTP_TX_MSG_HEADER2 … #define PTP_RX_INGRESS_SEC_HI … #define PTP_RX_INGRESS_SEC_LO … #define PTP_RX_INGRESS_NS_HI … #define PTP_RX_INGRESS_NS_LO … #define PTP_RX_MSG_HEADER2 … #define PTP_TSU_INT_EN … #define PTP_TSU_INT_EN_PTP_TX_TS_OVRFL_EN_ … #define PTP_TSU_INT_EN_PTP_TX_TS_EN_ … #define PTP_TSU_INT_EN_PTP_RX_TS_OVRFL_EN_ … #define PTP_TSU_INT_EN_PTP_RX_TS_EN_ … #define PTP_TSU_INT_STS … #define PTP_TSU_INT_STS_PTP_TX_TS_OVRFL_INT_ … #define PTP_TSU_INT_STS_PTP_TX_TS_EN_ … #define PTP_TSU_INT_STS_PTP_RX_TS_OVRFL_INT_ … #define PTP_TSU_INT_STS_PTP_RX_TS_EN_ … #define LAN8814_LED_CTRL_1 … #define LAN8814_LED_CTRL_1_KSZ9031_LED_MODE_ … /* PHY Control 1 */ #define MII_KSZPHY_CTRL_1 … #define KSZ8081_CTRL1_MDIX_STAT … /* PHY Control 2 / PHY Control (if no PHY Control 1) */ #define MII_KSZPHY_CTRL_2 … #define MII_KSZPHY_CTRL … /* bitmap of PHY register to set interrupt mode */ #define KSZ8081_CTRL2_HP_MDIX … #define KSZ8081_CTRL2_MDI_MDI_X_SELECT … #define KSZ8081_CTRL2_DISABLE_AUTO_MDIX … #define KSZ8081_CTRL2_FORCE_LINK … #define KSZ8081_CTRL2_POWER_SAVING … #define KSZPHY_CTRL_INT_ACTIVE_HIGH … #define KSZPHY_RMII_REF_CLK_SEL … /* Write/read to/from extended registers */ #define MII_KSZPHY_EXTREG … #define KSZPHY_EXTREG_WRITE … #define MII_KSZPHY_EXTREG_WRITE … #define MII_KSZPHY_EXTREG_READ … /* Extended registers */ #define MII_KSZPHY_CLK_CONTROL_PAD_SKEW … #define MII_KSZPHY_RX_DATA_PAD_SKEW … #define MII_KSZPHY_TX_DATA_PAD_SKEW … #define PS_TO_REG … #define FIFO_SIZE … #define LAN8814_PTP_GPIO_NUM … #define LAN8814_PTP_PEROUT_NUM … #define LAN8814_PTP_EXTTS_NUM … #define LAN8814_BUFFER_TIME … #define LAN8841_PTP_GENERAL_CONFIG_LTC_EVENT_200MS … #define LAN8841_PTP_GENERAL_CONFIG_LTC_EVENT_100MS … #define LAN8841_PTP_GENERAL_CONFIG_LTC_EVENT_50MS … #define LAN8841_PTP_GENERAL_CONFIG_LTC_EVENT_10MS … #define LAN8841_PTP_GENERAL_CONFIG_LTC_EVENT_5MS … #define LAN8841_PTP_GENERAL_CONFIG_LTC_EVENT_1MS … #define LAN8841_PTP_GENERAL_CONFIG_LTC_EVENT_500US … #define LAN8841_PTP_GENERAL_CONFIG_LTC_EVENT_100US … #define LAN8841_PTP_GENERAL_CONFIG_LTC_EVENT_50US … #define LAN8841_PTP_GENERAL_CONFIG_LTC_EVENT_10US … #define LAN8841_PTP_GENERAL_CONFIG_LTC_EVENT_5US … #define LAN8841_PTP_GENERAL_CONFIG_LTC_EVENT_1US … #define LAN8841_PTP_GENERAL_CONFIG_LTC_EVENT_500NS … #define LAN8841_PTP_GENERAL_CONFIG_LTC_EVENT_100NS … #define LAN8814_GPIO_EN1 … #define LAN8814_GPIO_EN2 … #define LAN8814_GPIO_DIR1 … #define LAN8814_GPIO_DIR2 … #define LAN8814_GPIO_BUF1 … #define LAN8814_GPIO_BUF2 … #define LAN8814_GPIO_EN_ADDR(pin) … #define LAN8814_GPIO_EN_BIT(pin) … #define LAN8814_GPIO_DIR_ADDR(pin) … #define LAN8814_GPIO_DIR_BIT(pin) … #define LAN8814_GPIO_BUF_ADDR(pin) … #define LAN8814_GPIO_BUF_BIT(pin) … #define LAN8814_EVENT_A … #define LAN8814_EVENT_B … #define LAN8814_PTP_GENERAL_CONFIG … #define LAN8814_PTP_GENERAL_CONFIG_LTC_EVENT_MASK(event) … #define LAN8814_PTP_GENERAL_CONFIG_LTC_EVENT_SET(event, value) … #define LAN8814_PTP_GENERAL_CONFIG_RELOAD_ADD_X(event) … #define LAN8814_PTP_GENERAL_CONFIG_POLARITY_X(event) … #define LAN8814_PTP_CLOCK_TARGET_SEC_HI(event) … #define LAN8814_PTP_CLOCK_TARGET_SEC_LO(event) … #define LAN8814_PTP_CLOCK_TARGET_NS_HI(event) … #define LAN8814_PTP_CLOCK_TARGET_NS_LO(event) … #define LAN8814_PTP_CLOCK_TARGET_RELOAD_SEC_HI(event) … #define LAN8814_PTP_CLOCK_TARGET_RELOAD_SEC_LO(event) … #define LAN8814_PTP_CLOCK_TARGET_RELOAD_NS_HI(event) … #define LAN8814_PTP_CLOCK_TARGET_RELOAD_NS_LO(event) … /* Delay used to get the second part from the LTC */ #define LAN8841_GET_SEC_LTC_DELAY … struct kszphy_hw_stat { … }; static struct kszphy_hw_stat kszphy_hw_stats[] = …; struct kszphy_type { … }; /* Shared structure between the PHYs of the same package. */ struct lan8814_shared_priv { … }; struct lan8814_ptp_rx_ts { … }; struct kszphy_ptp_priv { … }; struct kszphy_priv { … }; static const struct kszphy_type lan8814_type = …; static const struct kszphy_type ksz886x_type = …; static const struct kszphy_type ksz8021_type = …; static const struct kszphy_type ksz8041_type = …; static const struct kszphy_type ksz8051_type = …; static const struct kszphy_type ksz8081_type = …; static const struct kszphy_type ks8737_type = …; static const struct kszphy_type ksz9021_type = …; static const struct kszphy_type ksz9131_type = …; static const struct kszphy_type lan8841_type = …; static int kszphy_extended_write(struct phy_device *phydev, u32 regnum, u16 val) { … } static int kszphy_extended_read(struct phy_device *phydev, u32 regnum) { … } static int kszphy_ack_interrupt(struct phy_device *phydev) { … } static int kszphy_config_intr(struct phy_device *phydev) { … } static irqreturn_t kszphy_handle_interrupt(struct phy_device *phydev) { … } static int kszphy_rmii_clk_sel(struct phy_device *phydev, bool val) { … } static int kszphy_setup_led(struct phy_device *phydev, u32 reg, int val) { … } /* Disable PHY address 0 as the broadcast address, so that it can be used as a * unique (non-broadcast) address on a shared bus. */ static int kszphy_broadcast_disable(struct phy_device *phydev) { … } static int kszphy_nand_tree_disable(struct phy_device *phydev) { … } /* Some config bits need to be set again on resume, handle them here. */ static int kszphy_config_reset(struct phy_device *phydev) { … } static int kszphy_config_init(struct phy_device *phydev) { … } static int ksz8041_fiber_mode(struct phy_device *phydev) { … } static int ksz8041_config_init(struct phy_device *phydev) { … } static int ksz8041_config_aneg(struct phy_device *phydev) { … } static int ksz8051_ksz8795_match_phy_device(struct phy_device *phydev, const bool ksz_8051) { … } static int ksz8051_match_phy_device(struct phy_device *phydev) { … } static int ksz8081_config_init(struct phy_device *phydev) { … } static int ksz8081_config_mdix(struct phy_device *phydev, u8 ctrl) { … } static int ksz8081_config_aneg(struct phy_device *phydev) { … } static int ksz8081_mdix_update(struct phy_device *phydev) { … } static int ksz8081_read_status(struct phy_device *phydev) { … } static int ksz8061_config_init(struct phy_device *phydev) { … } static int ksz8795_match_phy_device(struct phy_device *phydev) { … } static int ksz9021_load_values_from_of(struct phy_device *phydev, const struct device_node *of_node, u16 reg, const char *field1, const char *field2, const char *field3, const char *field4) { … } static int ksz9021_config_init(struct phy_device *phydev) { … } #define KSZ9031_PS_TO_REG … /* Extended registers */ /* MMD Address 0x0 */ #define MII_KSZ9031RN_FLP_BURST_TX_LO … #define MII_KSZ9031RN_FLP_BURST_TX_HI … /* MMD Address 0x2 */ #define MII_KSZ9031RN_CONTROL_PAD_SKEW … #define MII_KSZ9031RN_RX_CTL_M … #define MII_KSZ9031RN_TX_CTL_M … #define MII_KSZ9031RN_RX_DATA_PAD_SKEW … #define MII_KSZ9031RN_RXD3 … #define MII_KSZ9031RN_RXD2 … #define MII_KSZ9031RN_RXD1 … #define MII_KSZ9031RN_RXD0 … #define MII_KSZ9031RN_TX_DATA_PAD_SKEW … #define MII_KSZ9031RN_TXD3 … #define MII_KSZ9031RN_TXD2 … #define MII_KSZ9031RN_TXD1 … #define MII_KSZ9031RN_TXD0 … #define MII_KSZ9031RN_CLK_PAD_SKEW … #define MII_KSZ9031RN_GTX_CLK … #define MII_KSZ9031RN_RX_CLK … /* KSZ9031 has internal RGMII_IDRX = 1.2ns and RGMII_IDTX = 0ns. To * provide different RGMII options we need to configure delay offset * for each pad relative to build in delay. */ /* keep rx as "No delay adjustment" and set rx_clk to +0.60ns to get delays of * 1.80ns */ #define RX_ID … #define RX_CLK_ID … /* set rx to +0.30ns and rx_clk to -0.90ns to compensate the * internal 1.2ns delay. */ #define RX_ND … #define RX_CLK_ND … /* set tx to -0.42ns and tx_clk to +0.96ns to get 1.38ns delay */ #define TX_ID … #define TX_CLK_ID … /* set tx and tx_clk to "No delay adjustment" to keep 0ns * dealy */ #define TX_ND … #define TX_CLK_ND … /* MMD Address 0x1C */ #define MII_KSZ9031RN_EDPD … #define MII_KSZ9031RN_EDPD_ENABLE … static int ksz9031_of_load_skew_values(struct phy_device *phydev, const struct device_node *of_node, u16 reg, size_t field_sz, const char *field[], u8 numfields, bool *update) { … } /* Center KSZ9031RNX FLP timing at 16ms. */ static int ksz9031_center_flp_timing(struct phy_device *phydev) { … } /* Enable energy-detect power-down mode */ static int ksz9031_enable_edpd(struct phy_device *phydev) { … } static int ksz9031_config_rgmii_delay(struct phy_device *phydev) { … } static int ksz9031_config_init(struct phy_device *phydev) { … } #define KSZ9131_SKEW_5BIT_MAX … #define KSZ9131_SKEW_4BIT_MAX … #define KSZ9131_OFFSET … #define KSZ9131_STEP … static int ksz9131_of_load_skew_values(struct phy_device *phydev, struct device_node *of_node, u16 reg, size_t field_sz, char *field[], u8 numfields) { … } #define KSZ9131RN_MMD_COMMON_CTRL_REG … #define KSZ9131RN_RXC_DLL_CTRL … #define KSZ9131RN_TXC_DLL_CTRL … #define KSZ9131RN_DLL_ENABLE_DELAY … static int ksz9131_config_rgmii_delay(struct phy_device *phydev) { … } /* Silicon Errata DS80000693B * * When LEDs are configured in Individual Mode, LED1 is ON in a no-link * condition. Workaround is to set register 0x1e, bit 9, this way LED1 behaves * according to the datasheet (off if there is no link). */ static int ksz9131_led_errata(struct phy_device *phydev) { … } static int ksz9131_config_init(struct phy_device *phydev) { … } #define MII_KSZ9131_AUTO_MDIX … #define MII_KSZ9131_AUTO_MDI_SET … #define MII_KSZ9131_AUTO_MDIX_SWAP_OFF … #define MII_KSZ9131_DIG_AXAN_STS … #define MII_KSZ9131_DIG_AXAN_STS_LINK_DET … #define MII_KSZ9131_DIG_AXAN_STS_A_SELECT … static int ksz9131_mdix_update(struct phy_device *phydev) { … } static int ksz9131_config_mdix(struct phy_device *phydev, u8 ctrl) { … } static int ksz9131_read_status(struct phy_device *phydev) { … } static int ksz9131_config_aneg(struct phy_device *phydev) { … } static int ksz9477_get_features(struct phy_device *phydev) { … } #define KSZ8873MLL_GLOBAL_CONTROL_4 … #define KSZ8873MLL_GLOBAL_CONTROL_4_DUPLEX … #define KSZ8873MLL_GLOBAL_CONTROL_4_SPEED … static int ksz8873mll_read_status(struct phy_device *phydev) { … } static int ksz9031_get_features(struct phy_device *phydev) { … } static int ksz9031_read_status(struct phy_device *phydev) { … } static int ksz9x31_cable_test_start(struct phy_device *phydev) { … } static int ksz9x31_cable_test_result_trans(u16 status) { … } static bool ksz9x31_cable_test_failed(u16 status) { … } static bool ksz9x31_cable_test_fault_length_valid(u16 status) { … } static int ksz9x31_cable_test_fault_length(struct phy_device *phydev, u16 stat) { … } static int ksz9x31_cable_test_wait_for_completion(struct phy_device *phydev) { … } static int ksz9x31_cable_test_get_pair(int pair) { … } static int ksz9x31_cable_test_one_pair(struct phy_device *phydev, int pair) { … } static int ksz9x31_cable_test_get_status(struct phy_device *phydev, bool *finished) { … } static int ksz8873mll_config_aneg(struct phy_device *phydev) { … } static int ksz886x_config_mdix(struct phy_device *phydev, u8 ctrl) { … } static int ksz886x_config_aneg(struct phy_device *phydev) { … } static int ksz886x_mdix_update(struct phy_device *phydev) { … } static int ksz886x_read_status(struct phy_device *phydev) { … } struct ksz9477_errata_write { … }; static const struct ksz9477_errata_write ksz9477_errata_writes[] = …; static int ksz9477_phy_errata(struct phy_device *phydev) { … } static int ksz9477_config_init(struct phy_device *phydev) { … } static int kszphy_get_sset_count(struct phy_device *phydev) { … } static void kszphy_get_strings(struct phy_device *phydev, u8 *data) { … } static u64 kszphy_get_stat(struct phy_device *phydev, int i) { … } static void kszphy_get_stats(struct phy_device *phydev, struct ethtool_stats *stats, u64 *data) { … } static int kszphy_suspend(struct phy_device *phydev) { … } static void kszphy_parse_led_mode(struct phy_device *phydev) { … } static int kszphy_resume(struct phy_device *phydev) { … } static int ksz9477_resume(struct phy_device *phydev) { … } static int ksz8061_resume(struct phy_device *phydev) { … } static int kszphy_probe(struct phy_device *phydev) { … } static int lan8814_cable_test_start(struct phy_device *phydev) { … } static int ksz886x_cable_test_start(struct phy_device *phydev) { … } static __always_inline int ksz886x_cable_test_result_trans(u16 status, u16 mask) { … } static __always_inline bool ksz886x_cable_test_failed(u16 status, u16 mask) { … } static __always_inline bool ksz886x_cable_test_fault_length_valid(u16 status, u16 mask) { … } static __always_inline int ksz886x_cable_test_fault_length(struct phy_device *phydev, u16 status, u16 data_mask) { … } static int ksz886x_cable_test_wait_for_completion(struct phy_device *phydev) { … } static int lan8814_cable_test_one_pair(struct phy_device *phydev, int pair) { … } static int ksz886x_cable_test_one_pair(struct phy_device *phydev, int pair) { … } static int ksz886x_cable_test_get_status(struct phy_device *phydev, bool *finished) { … } #define LAN_EXT_PAGE_ACCESS_CONTROL … #define LAN_EXT_PAGE_ACCESS_ADDRESS_DATA … #define LAN_EXT_PAGE_ACCESS_CTRL_EP_FUNC … #define LAN8814_QSGMII_SOFT_RESET … #define LAN8814_QSGMII_SOFT_RESET_BIT … #define LAN8814_QSGMII_PCS1G_ANEG_CONFIG … #define LAN8814_QSGMII_PCS1G_ANEG_CONFIG_ANEG_ENA … #define LAN8814_ALIGN_SWAP … #define LAN8814_ALIGN_TX_A_B_SWAP … #define LAN8814_ALIGN_TX_A_B_SWAP_MASK … #define LAN8804_ALIGN_SWAP … #define LAN8804_ALIGN_TX_A_B_SWAP … #define LAN8804_ALIGN_TX_A_B_SWAP_MASK … #define LAN8814_CLOCK_MANAGEMENT … #define LAN8814_LINK_QUALITY … static int lanphy_read_page_reg(struct phy_device *phydev, int page, u32 addr) { … } static int lanphy_write_page_reg(struct phy_device *phydev, int page, u16 addr, u16 val) { … } static int lan8814_config_ts_intr(struct phy_device *phydev, bool enable) { … } static void lan8814_ptp_rx_ts_get(struct phy_device *phydev, u32 *seconds, u32 *nano_seconds, u16 *seq_id) { … } static void lan8814_ptp_tx_ts_get(struct phy_device *phydev, u32 *seconds, u32 *nano_seconds, u16 *seq_id) { … } static int lan8814_ts_info(struct mii_timestamper *mii_ts, struct kernel_ethtool_ts_info *info) { … } static void lan8814_flush_fifo(struct phy_device *phydev, bool egress) { … } static int lan8814_hwtstamp(struct mii_timestamper *mii_ts, struct kernel_hwtstamp_config *config, struct netlink_ext_ack *extack) { … } static void lan8814_txtstamp(struct mii_timestamper *mii_ts, struct sk_buff *skb, int type) { … } static bool lan8814_get_sig_rx(struct sk_buff *skb, u16 *sig) { … } static bool lan8814_match_rx_skb(struct kszphy_ptp_priv *ptp_priv, struct sk_buff *skb) { … } static bool lan8814_rxtstamp(struct mii_timestamper *mii_ts, struct sk_buff *skb, int type) { … } static void lan8814_ptp_clock_set(struct phy_device *phydev, time64_t sec, u32 nsec) { … } static void lan8814_ptp_clock_get(struct phy_device *phydev, time64_t *sec, u32 *nsec) { … } static int lan8814_ptpci_gettime64(struct ptp_clock_info *ptpci, struct timespec64 *ts) { … } static int lan8814_ptpci_settime64(struct ptp_clock_info *ptpci, const struct timespec64 *ts) { … } static void lan8814_ptp_set_target(struct phy_device *phydev, int event, s64 start_sec, u32 start_nsec) { … } static void lan8814_ptp_update_target(struct phy_device *phydev, time64_t sec) { … } static void lan8814_ptp_clock_step(struct phy_device *phydev, s64 time_step_ns) { … } static int lan8814_ptpci_adjtime(struct ptp_clock_info *ptpci, s64 delta) { … } static int lan8814_ptpci_adjfine(struct ptp_clock_info *ptpci, long scaled_ppm) { … } static void lan8814_ptp_set_reload(struct phy_device *phydev, int event, s64 period_sec, u32 period_nsec) { … } static void lan8814_ptp_enable_event(struct phy_device *phydev, int event, int pulse_width) { … } static void lan8814_ptp_disable_event(struct phy_device *phydev, int event) { … } static void lan8814_ptp_perout_off(struct phy_device *phydev, int pin) { … } static void lan8814_ptp_perout_on(struct phy_device *phydev, int pin) { … } static int lan8814_ptp_perout(struct ptp_clock_info *ptpci, struct ptp_clock_request *rq, int on) { … } static void lan8814_ptp_extts_on(struct phy_device *phydev, int pin, u32 flags) { … } static void lan8814_ptp_extts_off(struct phy_device *phydev, int pin) { … } static int lan8814_ptp_extts(struct ptp_clock_info *ptpci, struct ptp_clock_request *rq, int on) { … } static int lan8814_ptpci_enable(struct ptp_clock_info *ptpci, struct ptp_clock_request *rq, int on) { … } static int lan8814_ptpci_verify(struct ptp_clock_info *ptp, unsigned int pin, enum ptp_pin_function func, unsigned int chan) { … } static bool lan8814_get_sig_tx(struct sk_buff *skb, u16 *sig) { … } static void lan8814_match_tx_skb(struct kszphy_ptp_priv *ptp_priv, u32 seconds, u32 nsec, u16 seq_id) { … } static void lan8814_dequeue_tx_skb(struct kszphy_ptp_priv *ptp_priv) { … } static void lan8814_get_tx_ts(struct kszphy_ptp_priv *ptp_priv) { … } static bool lan8814_match_skb(struct kszphy_ptp_priv *ptp_priv, struct lan8814_ptp_rx_ts *rx_ts) { … } static void lan8814_match_rx_ts(struct kszphy_ptp_priv *ptp_priv, struct lan8814_ptp_rx_ts *rx_ts) { … } static void lan8814_get_rx_ts(struct kszphy_ptp_priv *ptp_priv) { … } static void lan8814_handle_ptp_interrupt(struct phy_device *phydev, u16 status) { … } static int lan8814_gpio_process_cap(struct lan8814_shared_priv *shared) { … } static int lan8814_handle_gpio_interrupt(struct phy_device *phydev, u16 status) { … } static int lan8804_config_init(struct phy_device *phydev) { … } static irqreturn_t lan8804_handle_interrupt(struct phy_device *phydev) { … } #define LAN8804_OUTPUT_CONTROL … #define LAN8804_OUTPUT_CONTROL_INTR_BUFFER … #define LAN8804_CONTROL … #define LAN8804_CONTROL_INTR_POLARITY … static int lan8804_config_intr(struct phy_device *phydev) { … } static irqreturn_t lan8814_handle_interrupt(struct phy_device *phydev) { … } static int lan8814_ack_interrupt(struct phy_device *phydev) { … } static int lan8814_config_intr(struct phy_device *phydev) { … } static void lan8814_ptp_init(struct phy_device *phydev) { … } static int lan8814_ptp_probe_once(struct phy_device *phydev) { … } static void lan8814_setup_led(struct phy_device *phydev, int val) { … } static int lan8814_config_init(struct phy_device *phydev) { … } /* It is expected that there will not be any 'lan8814_take_coma_mode' * function called in suspend. Because the GPIO line can be shared, so if one of * the phys goes back in coma mode, then all the other PHYs will go, which is * wrong. */ static int lan8814_release_coma_mode(struct phy_device *phydev) { … } static void lan8814_clear_2psp_bit(struct phy_device *phydev) { … } static void lan8814_update_meas_time(struct phy_device *phydev) { … } static int lan8814_probe(struct phy_device *phydev) { … } #define LAN8841_MMD_TIMER_REG … #define LAN8841_MMD0_REGISTER_17 … #define LAN8841_MMD0_REGISTER_17_DROP_OPT(x) … #define LAN8841_MMD0_REGISTER_17_XMIT_TOG_TX_DIS … #define LAN8841_OPERATION_MODE_STRAP_OVERRIDE_LOW_REG … #define LAN8841_OPERATION_MODE_STRAP_OVERRIDE_LOW_REG_MAGJACK … #define LAN8841_MMD_ANALOG_REG … #define LAN8841_ANALOG_CONTROL_1 … #define LAN8841_ANALOG_CONTROL_1_PLL_TRIM(x) … #define LAN8841_ANALOG_CONTROL_10 … #define LAN8841_ANALOG_CONTROL_10_PLL_DIV(x) … #define LAN8841_ANALOG_CONTROL_11 … #define LAN8841_ANALOG_CONTROL_11_LDO_REF(x) … #define LAN8841_TX_LOW_I_CH_C_D_POWER_MANAGMENT … #define LAN8841_TX_LOW_I_CH_C_D_POWER_MANAGMENT_VAL … #define LAN8841_BTRX_POWER_DOWN … #define LAN8841_BTRX_POWER_DOWN_QBIAS_CH_A … #define LAN8841_BTRX_POWER_DOWN_BTRX_CH_A … #define LAN8841_BTRX_POWER_DOWN_QBIAS_CH_B … #define LAN8841_BTRX_POWER_DOWN_BTRX_CH_B … #define LAN8841_BTRX_POWER_DOWN_BTRX_CH_C … #define LAN8841_BTRX_POWER_DOWN_BTRX_CH_D … #define LAN8841_ADC_CHANNEL_MASK … #define LAN8841_PTP_RX_PARSE_L2_ADDR_EN … #define LAN8841_PTP_RX_PARSE_IP_ADDR_EN … #define LAN8841_PTP_RX_VERSION … #define LAN8841_PTP_TX_PARSE_L2_ADDR_EN … #define LAN8841_PTP_TX_PARSE_IP_ADDR_EN … #define LAN8841_PTP_TX_VERSION … #define LAN8841_PTP_CMD_CTL … #define LAN8841_PTP_CMD_CTL_PTP_ENABLE … #define LAN8841_PTP_CMD_CTL_PTP_DISABLE … #define LAN8841_PTP_CMD_CTL_PTP_RESET … #define LAN8841_PTP_RX_PARSE_CONFIG … #define LAN8841_PTP_TX_PARSE_CONFIG … #define LAN8841_PTP_RX_MODE … #define LAN8841_PTP_INSERT_TS_EN … #define LAN8841_PTP_INSERT_TS_32BIT … static int lan8841_config_init(struct phy_device *phydev) { … } #define LAN8841_OUTPUT_CTRL … #define LAN8841_OUTPUT_CTRL_INT_BUFFER … #define LAN8841_INT_PTP … static int lan8841_config_intr(struct phy_device *phydev) { … } #define LAN8841_PTP_TX_EGRESS_SEC_LO … #define LAN8841_PTP_TX_EGRESS_SEC_HI … #define LAN8841_PTP_TX_EGRESS_NS_LO … #define LAN8841_PTP_TX_EGRESS_NS_HI … #define LAN8841_PTP_TX_EGRESS_NSEC_HI_VALID … #define LAN8841_PTP_TX_MSG_HEADER2 … static bool lan8841_ptp_get_tx_ts(struct kszphy_ptp_priv *ptp_priv, u32 *sec, u32 *nsec, u16 *seq) { … } static void lan8841_ptp_process_tx_ts(struct kszphy_ptp_priv *ptp_priv) { … } #define LAN8841_PTP_INT_STS … #define LAN8841_PTP_INT_STS_PTP_TX_TS_OVRFL_INT … #define LAN8841_PTP_INT_STS_PTP_TX_TS_INT … #define LAN8841_PTP_INT_STS_PTP_GPIO_CAP_INT … static void lan8841_ptp_flush_fifo(struct kszphy_ptp_priv *ptp_priv) { … } #define LAN8841_PTP_GPIO_CAP_STS … #define LAN8841_PTP_GPIO_SEL … #define LAN8841_PTP_GPIO_SEL_GPIO_SEL(gpio) … #define LAN8841_PTP_GPIO_RE_LTC_SEC_HI_CAP … #define LAN8841_PTP_GPIO_RE_LTC_SEC_LO_CAP … #define LAN8841_PTP_GPIO_RE_LTC_NS_HI_CAP … #define LAN8841_PTP_GPIO_RE_LTC_NS_LO_CAP … #define LAN8841_PTP_GPIO_FE_LTC_SEC_HI_CAP … #define LAN8841_PTP_GPIO_FE_LTC_SEC_LO_CAP … #define LAN8841_PTP_GPIO_FE_LTC_NS_HI_CAP … #define LAN8841_PTP_GPIO_FE_LTC_NS_LO_CAP … static void lan8841_gpio_process_cap(struct kszphy_ptp_priv *ptp_priv) { … } static void lan8841_handle_ptp_interrupt(struct phy_device *phydev) { … } #define LAN8841_INTS_PTP … static irqreturn_t lan8841_handle_interrupt(struct phy_device *phydev) { … } static int lan8841_ts_info(struct mii_timestamper *mii_ts, struct kernel_ethtool_ts_info *info) { … } #define LAN8841_PTP_INT_EN … #define LAN8841_PTP_INT_EN_PTP_TX_TS_OVRFL_EN … #define LAN8841_PTP_INT_EN_PTP_TX_TS_EN … static void lan8841_ptp_enable_processing(struct kszphy_ptp_priv *ptp_priv, bool enable) { … } #define LAN8841_PTP_RX_TIMESTAMP_EN … #define LAN8841_PTP_TX_TIMESTAMP_EN … #define LAN8841_PTP_TX_MOD … static int lan8841_hwtstamp(struct mii_timestamper *mii_ts, struct kernel_hwtstamp_config *config, struct netlink_ext_ack *extack) { … } static bool lan8841_rxtstamp(struct mii_timestamper *mii_ts, struct sk_buff *skb, int type) { … } #define LAN8841_EVENT_A … #define LAN8841_EVENT_B … #define LAN8841_PTP_LTC_TARGET_SEC_HI(event) … #define LAN8841_PTP_LTC_TARGET_SEC_LO(event) … #define LAN8841_PTP_LTC_TARGET_NS_HI(event) … #define LAN8841_PTP_LTC_TARGET_NS_LO(event) … static int lan8841_ptp_set_target(struct kszphy_ptp_priv *ptp_priv, u8 event, s64 sec, u32 nsec) { … } #define LAN8841_BUFFER_TIME … static int lan8841_ptp_update_target(struct kszphy_ptp_priv *ptp_priv, const struct timespec64 *ts) { … } #define LAN8841_PTP_LTC_TARGET_RELOAD_SEC_HI(event) … #define LAN8841_PTP_LTC_TARGET_RELOAD_SEC_LO(event) … #define LAN8841_PTP_LTC_TARGET_RELOAD_NS_HI(event) … #define LAN8841_PTP_LTC_TARGET_RELOAD_NS_LO(event) … static int lan8841_ptp_set_reload(struct kszphy_ptp_priv *ptp_priv, u8 event, s64 sec, u32 nsec) { … } #define LAN8841_PTP_LTC_SET_SEC_HI … #define LAN8841_PTP_LTC_SET_SEC_MID … #define LAN8841_PTP_LTC_SET_SEC_LO … #define LAN8841_PTP_LTC_SET_NS_HI … #define LAN8841_PTP_LTC_SET_NS_LO … #define LAN8841_PTP_CMD_CTL_PTP_LTC_LOAD … static int lan8841_ptp_settime64(struct ptp_clock_info *ptp, const struct timespec64 *ts) { … } #define LAN8841_PTP_LTC_RD_SEC_HI … #define LAN8841_PTP_LTC_RD_SEC_MID … #define LAN8841_PTP_LTC_RD_SEC_LO … #define LAN8841_PTP_LTC_RD_NS_HI … #define LAN8841_PTP_LTC_RD_NS_LO … #define LAN8841_PTP_CMD_CTL_PTP_LTC_READ … static int lan8841_ptp_gettime64(struct ptp_clock_info *ptp, struct timespec64 *ts) { … } static void lan8841_ptp_getseconds(struct ptp_clock_info *ptp, struct timespec64 *ts) { … } #define LAN8841_PTP_LTC_STEP_ADJ_LO … #define LAN8841_PTP_LTC_STEP_ADJ_HI … #define LAN8841_PTP_LTC_STEP_ADJ_DIR … #define LAN8841_PTP_CMD_CTL_PTP_LTC_STEP_SECONDS … #define LAN8841_PTP_CMD_CTL_PTP_LTC_STEP_NANOSECONDS … static int lan8841_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta) { … } #define LAN8841_PTP_LTC_RATE_ADJ_HI … #define LAN8841_PTP_LTC_RATE_ADJ_HI_DIR … #define LAN8841_PTP_LTC_RATE_ADJ_LO … static int lan8841_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm) { … } static int lan8841_ptp_verify(struct ptp_clock_info *ptp, unsigned int pin, enum ptp_pin_function func, unsigned int chan) { … } #define LAN8841_PTP_GPIO_NUM … #define LAN8841_GPIO_EN … #define LAN8841_GPIO_DIR … #define LAN8841_GPIO_BUF … static int lan8841_ptp_perout_off(struct kszphy_ptp_priv *ptp_priv, int pin) { … } static int lan8841_ptp_perout_on(struct kszphy_ptp_priv *ptp_priv, int pin) { … } #define LAN8841_GPIO_DATA_SEL1 … #define LAN8841_GPIO_DATA_SEL2 … #define LAN8841_GPIO_DATA_SEL_GPIO_DATA_SEL_EVENT_MASK … #define LAN8841_GPIO_DATA_SEL_GPIO_DATA_SEL_EVENT_A … #define LAN8841_GPIO_DATA_SEL_GPIO_DATA_SEL_EVENT_B … #define LAN8841_PTP_GENERAL_CONFIG … #define LAN8841_PTP_GENERAL_CONFIG_LTC_EVENT_POL_A … #define LAN8841_PTP_GENERAL_CONFIG_LTC_EVENT_POL_B … #define LAN8841_PTP_GENERAL_CONFIG_LTC_EVENT_A_MASK … #define LAN8841_PTP_GENERAL_CONFIG_LTC_EVENT_B_MASK … #define LAN8841_PTP_GENERAL_CONFIG_LTC_EVENT_A … #define LAN8841_PTP_GENERAL_CONFIG_LTC_EVENT_B … static int lan8841_ptp_remove_event(struct kszphy_ptp_priv *ptp_priv, int pin, u8 event) { … } static int lan8841_ptp_enable_event(struct kszphy_ptp_priv *ptp_priv, int pin, u8 event, int pulse_width) { … } #define LAN8841_PTP_GENERAL_CONFIG_LTC_EVENT_200MS … #define LAN8841_PTP_GENERAL_CONFIG_LTC_EVENT_100MS … #define LAN8841_PTP_GENERAL_CONFIG_LTC_EVENT_50MS … #define LAN8841_PTP_GENERAL_CONFIG_LTC_EVENT_10MS … #define LAN8841_PTP_GENERAL_CONFIG_LTC_EVENT_5MS … #define LAN8841_PTP_GENERAL_CONFIG_LTC_EVENT_1MS … #define LAN8841_PTP_GENERAL_CONFIG_LTC_EVENT_500US … #define LAN8841_PTP_GENERAL_CONFIG_LTC_EVENT_100US … #define LAN8841_PTP_GENERAL_CONFIG_LTC_EVENT_50US … #define LAN8841_PTP_GENERAL_CONFIG_LTC_EVENT_10US … #define LAN8841_PTP_GENERAL_CONFIG_LTC_EVENT_5US … #define LAN8841_PTP_GENERAL_CONFIG_LTC_EVENT_1US … #define LAN8841_PTP_GENERAL_CONFIG_LTC_EVENT_500NS … #define LAN8841_PTP_GENERAL_CONFIG_LTC_EVENT_100NS … static int lan8841_ptp_perout(struct ptp_clock_info *ptp, struct ptp_clock_request *rq, int on) { … } #define LAN8841_PTP_GPIO_CAP_EN … #define LAN8841_PTP_GPIO_CAP_EN_GPIO_RE_CAPTURE_ENABLE(gpio) … #define LAN8841_PTP_GPIO_CAP_EN_GPIO_FE_CAPTURE_ENABLE(gpio) … #define LAN8841_PTP_INT_EN_PTP_GPIO_CAP_EN … static int lan8841_ptp_extts_on(struct kszphy_ptp_priv *ptp_priv, int pin, u32 flags) { … } static int lan8841_ptp_extts_off(struct kszphy_ptp_priv *ptp_priv, int pin) { … } static int lan8841_ptp_extts(struct ptp_clock_info *ptp, struct ptp_clock_request *rq, int on) { … } static int lan8841_ptp_enable(struct ptp_clock_info *ptp, struct ptp_clock_request *rq, int on) { … } static long lan8841_ptp_do_aux_work(struct ptp_clock_info *ptp) { … } static struct ptp_clock_info lan8841_ptp_clock_info = …; #define LAN8841_OPERATION_MODE_STRAP_LOW_REGISTER … #define LAN8841_OPERATION_MODE_STRAP_LOW_REGISTER_STRAP_RGMII_EN … static int lan8841_probe(struct phy_device *phydev) { … } static int lan8841_suspend(struct phy_device *phydev) { … } static struct phy_driver ksphy_driver[] = …; module_phy_driver(ksphy_driver); MODULE_DESCRIPTION(…) …; MODULE_AUTHOR(…) …; MODULE_LICENSE(…) …; static struct mdio_device_id __maybe_unused micrel_tbl[] = …; MODULE_DEVICE_TABLE(mdio, micrel_tbl);
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