// SPDX-License-Identifier: GPL-2.0 // Copyright (c) 2018-2019 MediaTek Inc. /* A library for MediaTek SGMII circuit * * Author: Sean Wang <[email protected]> * Author: Alexander Couzens <[email protected]> * Author: Daniel Golle <[email protected]> * */ #include <linux/mdio.h> #include <linux/of.h> #include <linux/pcs/pcs-mtk-lynxi.h> #include <linux/phylink.h> #include <linux/regmap.h> /* SGMII subsystem config registers */ /* BMCR (low 16) BMSR (high 16) */ #define SGMSYS_PCS_CONTROL_1 … #define SGMII_BMCR … #define SGMII_BMSR … #define SGMSYS_PCS_DEVICE_ID … #define SGMII_LYNXI_DEV_ID … #define SGMSYS_PCS_ADVERTISE … #define SGMII_ADVERTISE … #define SGMII_LPA … #define SGMSYS_PCS_SCRATCH … #define SGMII_DEV_VERSION … /* Register to programmable link timer, the unit in 2 * 8ns */ #define SGMSYS_PCS_LINK_TIMER … #define SGMII_LINK_TIMER_MASK … #define SGMII_LINK_TIMER_VAL(ns) … /* Register to control remote fault */ #define SGMSYS_SGMII_MODE … #define SGMII_IF_MODE_SGMII … #define SGMII_SPEED_DUPLEX_AN … #define SGMII_SPEED_MASK … #define SGMII_SPEED_10 … #define SGMII_SPEED_100 … #define SGMII_SPEED_1000 … #define SGMII_DUPLEX_HALF … #define SGMII_REMOTE_FAULT_DIS … /* Register to reset SGMII design */ #define SGMSYS_RESERVED_0 … #define SGMII_SW_RESET … /* Register to set SGMII speed, ANA RG_ Control Signals III */ #define SGMII_PHY_SPEED_MASK … #define SGMII_PHY_SPEED_1_25G … #define SGMII_PHY_SPEED_3_125G … /* Register to power up QPHY */ #define SGMSYS_QPHY_PWR_STATE_CTRL … #define SGMII_PHYA_PWD … /* Register to QPHY wrapper control */ #define SGMSYS_QPHY_WRAP_CTRL … #define SGMII_PN_SWAP_MASK … #define SGMII_PN_SWAP_TX_RX … /* struct mtk_pcs_lynxi - This structure holds each sgmii regmap andassociated * data * @regmap: The register map pointing at the range used to setup * SGMII modes * @dev: Pointer to device owning the PCS * @ana_rgc3: The offset of register ANA_RGC3 relative to regmap * @interface: Currently configured interface mode * @pcs: Phylink PCS structure * @flags: Flags indicating hardware properties */ struct mtk_pcs_lynxi { … }; static struct mtk_pcs_lynxi *pcs_to_mtk_pcs_lynxi(struct phylink_pcs *pcs) { … } static void mtk_pcs_lynxi_get_state(struct phylink_pcs *pcs, struct phylink_link_state *state) { … } static int mtk_pcs_lynxi_config(struct phylink_pcs *pcs, unsigned int neg_mode, phy_interface_t interface, const unsigned long *advertising, bool permit_pause_to_mac) { … } static void mtk_pcs_lynxi_restart_an(struct phylink_pcs *pcs) { … } static void mtk_pcs_lynxi_link_up(struct phylink_pcs *pcs, unsigned int neg_mode, phy_interface_t interface, int speed, int duplex) { … } static void mtk_pcs_lynxi_disable(struct phylink_pcs *pcs) { … } static const struct phylink_pcs_ops mtk_pcs_lynxi_ops = …; struct phylink_pcs *mtk_pcs_lynxi_create(struct device *dev, struct regmap *regmap, u32 ana_rgc3, u32 flags) { … } EXPORT_SYMBOL(…); void mtk_pcs_lynxi_destroy(struct phylink_pcs *pcs) { … } EXPORT_SYMBOL(…); MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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