// SPDX-License-Identifier: GPL-2.0 /* * Copyright (C) 2022 Schneider Electric * * Clément Léger <[email protected]> */ #include <linux/clk.h> #include <linux/device.h> #include <linux/mdio.h> #include <linux/of.h> #include <linux/of_platform.h> #include <linux/pcs-rzn1-miic.h> #include <linux/phylink.h> #include <linux/platform_device.h> #include <linux/pm_runtime.h> #include <dt-bindings/net/pcs-rzn1-miic.h> #define MIIC_PRCMD … #define MIIC_ESID_CODE … #define MIIC_MODCTRL … #define MIIC_MODCTRL_SW_MODE … #define MIIC_CONVCTRL(port) … #define MIIC_CONVCTRL_CONV_SPEED … #define CONV_MODE_10MBPS … #define CONV_MODE_100MBPS … #define CONV_MODE_1000MBPS … #define MIIC_CONVCTRL_CONV_MODE … #define CONV_MODE_MII … #define CONV_MODE_RMII … #define CONV_MODE_RGMII … #define MIIC_CONVCTRL_FULLD … #define MIIC_CONVCTRL_RGMII_LINK … #define MIIC_CONVCTRL_RGMII_DUPLEX … #define MIIC_CONVCTRL_RGMII_SPEED … #define MIIC_CONVRST … #define MIIC_CONVRST_PHYIF_RST(port) … #define MIIC_CONVRST_PHYIF_RST_MASK … #define MIIC_SWCTRL … #define MIIC_SWDUPC … #define MIIC_MAX_NR_PORTS … #define MIIC_MODCTRL_CONF_CONV_NUM … #define MIIC_MODCTRL_CONF_NONE … /** * struct modctrl_match - Matching table entry for convctrl configuration * See section 8.2.1 of manual. * @mode_cfg: Configuration value for convctrl * @conv: Configuration of ethernet port muxes. First index is SWITCH_PORTIN, * then index 1 - 5 are CONV1 - CONV5. */ struct modctrl_match { … }; static struct modctrl_match modctrl_match_table[] = …; static const char * const conf_to_string[] = …; static const char *index_to_string[MIIC_MODCTRL_CONF_CONV_NUM] = …; /** * struct miic - MII converter structure * @base: base address of the MII converter * @dev: Device associated to the MII converter * @lock: Lock used for read-modify-write access */ struct miic { … }; /** * struct miic_port - Per port MII converter struct * @miic: backiling to MII converter structure * @pcs: PCS structure associated to the port * @port: port number * @interface: interface mode of the port */ struct miic_port { … }; static struct miic_port *phylink_pcs_to_miic_port(struct phylink_pcs *pcs) { … } static void miic_reg_writel(struct miic *miic, int offset, u32 value) { … } static u32 miic_reg_readl(struct miic *miic, int offset) { … } static void miic_reg_rmw(struct miic *miic, int offset, u32 mask, u32 val) { … } static void miic_converter_enable(struct miic *miic, int port, int enable) { … } static int miic_config(struct phylink_pcs *pcs, unsigned int neg_mode, phy_interface_t interface, const unsigned long *advertising, bool permit) { … } static void miic_link_up(struct phylink_pcs *pcs, unsigned int neg_mode, phy_interface_t interface, int speed, int duplex) { … } static int miic_validate(struct phylink_pcs *pcs, unsigned long *supported, const struct phylink_link_state *state) { … } static int miic_pre_init(struct phylink_pcs *pcs) { … } static const struct phylink_pcs_ops miic_phylink_ops = …; struct phylink_pcs *miic_create(struct device *dev, struct device_node *np) { … } EXPORT_SYMBOL(…); void miic_destroy(struct phylink_pcs *pcs) { … } EXPORT_SYMBOL(…); static int miic_init_hw(struct miic *miic, u32 cfg_mode) { … } static bool miic_modctrl_match(s8 table_val[MIIC_MODCTRL_CONF_CONV_NUM], s8 dt_val[MIIC_MODCTRL_CONF_CONV_NUM]) { … } static void miic_dump_conf(struct device *dev, s8 conf[MIIC_MODCTRL_CONF_CONV_NUM]) { … } static int miic_match_dt_conf(struct device *dev, s8 dt_val[MIIC_MODCTRL_CONF_CONV_NUM], u32 *mode_cfg) { … } static int miic_parse_dt(struct device *dev, u32 *mode_cfg) { … } static int miic_probe(struct platform_device *pdev) { … } static void miic_remove(struct platform_device *pdev) { … } static const struct of_device_id miic_of_mtable[] = …; MODULE_DEVICE_TABLE(of, miic_of_mtable); static struct platform_driver miic_driver = …; module_platform_driver(…) …; MODULE_LICENSE(…) …; MODULE_DESCRIPTION(…) …; MODULE_AUTHOR(…) …;
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