/* SPDX-License-Identifier: GPL-2.0 */ /* Microchip switch driver common header * * Copyright (C) 2017-2019 Microchip Technology Inc. */ #ifndef __KSZ_COMMON_H #define __KSZ_COMMON_H #include <linux/etherdevice.h> #include <linux/kernel.h> #include <linux/mutex.h> #include <linux/phy.h> #include <linux/regmap.h> #include <net/dsa.h> #include <linux/irq.h> #include <linux/platform_data/microchip-ksz.h> #include "ksz_ptp.h" #define KSZ_MAX_NUM_PORTS … /* all KSZ switches count ports from 1 */ #define KSZ_PORT_1 … #define KSZ_PORT_2 … #define KSZ_PORT_4 … struct ksz_device; struct ksz_port; struct phylink_mac_ops; enum ksz_regmap_width { … }; struct vlan_table { … }; struct ksz_port_mib { … }; struct ksz_mib_names { … }; struct ksz_chip_data { … }; struct ksz_irq { … }; struct ksz_ptp_irq { … }; struct ksz_switch_macaddr { … }; struct ksz_port { … }; struct ksz_device { … }; /* List of supported models */ enum ksz_model { … }; enum ksz_regs { … }; enum ksz_masks { … }; enum ksz_shifts { … }; enum ksz_xmii_ctrl0 { … }; enum ksz_xmii_ctrl1 { … }; struct alu_struct { … }; struct ksz_dev_ops { … }; struct ksz_device *ksz_switch_alloc(struct device *base, void *priv); int ksz_switch_register(struct ksz_device *dev); void ksz_switch_remove(struct ksz_device *dev); void ksz_init_mib_timer(struct ksz_device *dev); bool ksz_is_port_mac_global_usable(struct dsa_switch *ds, int port); void ksz_r_mib_stats64(struct ksz_device *dev, int port); void ksz88xx_r_mib_stats64(struct ksz_device *dev, int port); void ksz_port_stp_state_set(struct dsa_switch *ds, int port, u8 state); bool ksz_get_gbit(struct ksz_device *dev, int port); phy_interface_t ksz_get_xmii(struct ksz_device *dev, int port, bool gbit); extern const struct ksz_chip_data ksz_switch_chips[]; int ksz_switch_macaddr_get(struct dsa_switch *ds, int port, struct netlink_ext_ack *extack); void ksz_switch_macaddr_put(struct dsa_switch *ds); void ksz_switch_shutdown(struct ksz_device *dev); /* Common register access functions */ static inline struct regmap *ksz_regmap_8(struct ksz_device *dev) { … } static inline struct regmap *ksz_regmap_16(struct ksz_device *dev) { … } static inline struct regmap *ksz_regmap_32(struct ksz_device *dev) { … } static inline int ksz_read8(struct ksz_device *dev, u32 reg, u8 *val) { … } static inline int ksz_read16(struct ksz_device *dev, u32 reg, u16 *val) { … } static inline int ksz_read32(struct ksz_device *dev, u32 reg, u32 *val) { … } static inline int ksz_read64(struct ksz_device *dev, u32 reg, u64 *val) { … } static inline int ksz_write8(struct ksz_device *dev, u32 reg, u8 value) { … } static inline int ksz_write16(struct ksz_device *dev, u32 reg, u16 value) { … } static inline int ksz_write32(struct ksz_device *dev, u32 reg, u32 value) { … } static inline int ksz_rmw16(struct ksz_device *dev, u32 reg, u16 mask, u16 value) { … } static inline int ksz_rmw32(struct ksz_device *dev, u32 reg, u32 mask, u32 value) { … } static inline int ksz_write64(struct ksz_device *dev, u32 reg, u64 value) { … } static inline int ksz_rmw8(struct ksz_device *dev, int offset, u8 mask, u8 val) { … } static inline int ksz_pread8(struct ksz_device *dev, int port, int offset, u8 *data) { … } static inline int ksz_pread16(struct ksz_device *dev, int port, int offset, u16 *data) { … } static inline int ksz_pread32(struct ksz_device *dev, int port, int offset, u32 *data) { … } static inline int ksz_pwrite8(struct ksz_device *dev, int port, int offset, u8 data) { … } static inline int ksz_pwrite16(struct ksz_device *dev, int port, int offset, u16 data) { … } static inline int ksz_pwrite32(struct ksz_device *dev, int port, int offset, u32 data) { … } static inline int ksz_prmw8(struct ksz_device *dev, int port, int offset, u8 mask, u8 val) { … } static inline int ksz_prmw32(struct ksz_device *dev, int port, int offset, u32 mask, u32 val) { … } static inline void ksz_regmap_lock(void *__mtx) { … } static inline void ksz_regmap_unlock(void *__mtx) { … } static inline bool ksz_is_ksz87xx(struct ksz_device *dev) { … } static inline bool ksz_is_ksz88x3(struct ksz_device *dev) { … } static inline bool is_ksz8(struct ksz_device *dev) { … } static inline int is_lan937x(struct ksz_device *dev) { … } static inline bool is_lan937x_tx_phy(struct ksz_device *dev, int port) { … } /* STP State Defines */ #define PORT_TX_ENABLE … #define PORT_RX_ENABLE … #define PORT_LEARN_DISABLE … /* Switch ID Defines */ #define REG_CHIP_ID0 … #define SW_FAMILY_ID_M … #define KSZ87_FAMILY_ID … #define KSZ88_FAMILY_ID … #define KSZ8_PORT_STATUS_0 … #define KSZ8_PORT_FIBER_MODE … #define SW_CHIP_ID_M … #define KSZ87_CHIP_ID_94 … #define KSZ87_CHIP_ID_95 … #define KSZ88_CHIP_ID_63 … #define SW_REV_ID_M … /* KSZ9893, KSZ9563, KSZ8563 specific register */ #define REG_CHIP_ID4 … #define SKU_ID_KSZ8563 … #define SKU_ID_KSZ9563 … /* Driver set switch broadcast storm protection at 10% rate. */ #define BROADCAST_STORM_PROT_RATE … /* 148,800 frames * 67 ms / 100 */ #define BROADCAST_STORM_VALUE … #define BROADCAST_STORM_RATE_HI … #define BROADCAST_STORM_RATE_LO … #define BROADCAST_STORM_RATE … #define MULTICAST_STORM_DISABLE … #define SW_START … /* xMII configuration */ #define P_MII_DUPLEX_M … #define P_MII_100MBIT_M … #define P_GMII_1GBIT_M … #define P_RGMII_ID_IG_ENABLE … #define P_RGMII_ID_EG_ENABLE … #define P_MII_MAC_MODE … #define P_MII_SEL_M … /* Interrupt */ #define REG_SW_PORT_INT_STATUS__1 … #define REG_SW_PORT_INT_MASK__1 … #define REG_PORT_INT_STATUS … #define REG_PORT_INT_MASK … #define PORT_SRC_PHY_INT … #define PORT_SRC_PTP_INT … #define KSZ8795_HUGE_PACKET_SIZE … #define KSZ8863_HUGE_PACKET_SIZE … #define KSZ8863_NORMAL_PACKET_SIZE … #define KSZ8_LEGAL_PACKET_SIZE … #define KSZ9477_MAX_FRAME_SIZE … #define KSZ8873_REG_GLOBAL_CTRL_12 … /* Drive Strength of I/O Pad * 0: 8mA, 1: 16mA */ #define KSZ8873_DRIVE_STRENGTH_16MA … #define KSZ8795_REG_SW_CTRL_20 … #define KSZ9477_REG_SW_IO_STRENGTH … #define SW_DRIVE_STRENGTH_M … #define SW_DRIVE_STRENGTH_2MA … #define SW_DRIVE_STRENGTH_4MA … #define SW_DRIVE_STRENGTH_8MA … #define SW_DRIVE_STRENGTH_12MA … #define SW_DRIVE_STRENGTH_16MA … #define SW_DRIVE_STRENGTH_20MA … #define SW_DRIVE_STRENGTH_24MA … #define SW_DRIVE_STRENGTH_28MA … #define SW_HI_SPEED_DRIVE_STRENGTH_S … #define SW_LO_SPEED_DRIVE_STRENGTH_S … #define KSZ9477_REG_PORT_OUT_RATE_0 … #define KSZ9477_OUT_RATE_NO_LIMIT … #define KSZ9477_PORT_MRI_TC_MAP__4 … #define KSZ9477_PORT_TC_MAP_S … /* CBS related registers */ #define REG_PORT_MTI_QUEUE_INDEX__4 … #define REG_PORT_MTI_QUEUE_CTRL_0 … #define MTI_SCHEDULE_MODE_M … #define MTI_SCHEDULE_STRICT_PRIO … #define MTI_SCHEDULE_WRR … #define MTI_SHAPING_M … #define MTI_SHAPING_OFF … #define MTI_SHAPING_SRP … #define MTI_SHAPING_TIME_AWARE … #define KSZ9477_PORT_MTI_QUEUE_CTRL_1 … #define KSZ9477_DEFAULT_WRR_WEIGHT … #define REG_PORT_MTI_HI_WATER_MARK … #define REG_PORT_MTI_LO_WATER_MARK … /* Regmap tables generation */ #define KSZ_SPI_OP_RD … #define KSZ_SPI_OP_WR … #define swabnot_used(x) … #define KSZ_SPI_OP_FLAG_MASK(opcode, swp, regbits, regpad) … #define KSZ_REGMAP_ENTRY(width, swp, regbits, regpad, regalign) … #define KSZ_REGMAP_TABLE(ksz, swp, regbits, regpad, regalign) … #endif
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