linux/drivers/net/dsa/mv88e6xxx/serdes.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Marvell 88E6xxx SERDES manipulation, via SMI bus
 *
 * Copyright (c) 2008 Marvell Semiconductor
 *
 * Copyright (c) 2017 Andrew Lunn <[email protected]>
 */

#include <linux/interrupt.h>
#include <linux/irqdomain.h>
#include <linux/mii.h>

#include "chip.h"
#include "global2.h"
#include "phy.h"
#include "port.h"
#include "serdes.h"

static int mv88e6352_serdes_read(struct mv88e6xxx_chip *chip, int reg,
				 u16 *val)
{}

static int mv88e6352_serdes_write(struct mv88e6xxx_chip *chip, int reg,
				  u16 val)
{}

static int mv88e6390_serdes_read(struct mv88e6xxx_chip *chip,
				 int lane, int device, int reg, u16 *val)
{}

int mv88e6xxx_pcs_decode_state(struct device *dev, u16 bmsr, u16 lpa,
			       u16 status, struct phylink_link_state *state)
{}

struct mv88e6352_serdes_hw_stat {};

static struct mv88e6352_serdes_hw_stat mv88e6352_serdes_hw_stats[] =;

int mv88e6352_serdes_get_sset_count(struct mv88e6xxx_chip *chip, int port)
{}

int mv88e6352_serdes_get_strings(struct mv88e6xxx_chip *chip,
				 int port, uint8_t *data)
{}

static uint64_t mv88e6352_serdes_get_stat(struct mv88e6xxx_chip *chip,
					  struct mv88e6352_serdes_hw_stat *stat)
{}

size_t mv88e6352_serdes_get_stats(struct mv88e6xxx_chip *chip, int port,
				  uint64_t *data)
{}

unsigned int mv88e6352_serdes_irq_mapping(struct mv88e6xxx_chip *chip, int port)
{}

int mv88e6352_serdes_get_regs_len(struct mv88e6xxx_chip *chip, int port)
{}

void mv88e6352_serdes_get_regs(struct mv88e6xxx_chip *chip, int port, void *_p)
{}

int mv88e6341_serdes_get_lane(struct mv88e6xxx_chip *chip, int port)
{}

int mv88e6390_serdes_get_lane(struct mv88e6xxx_chip *chip, int port)
{}

int mv88e6390x_serdes_get_lane(struct mv88e6xxx_chip *chip, int port)
{}

/* Only Ports 0, 9 and 10 have SERDES lanes. Return the SERDES lane address
 * a port is using else Returns -ENODEV.
 */
int mv88e6393x_serdes_get_lane(struct mv88e6xxx_chip *chip, int port)
{}

struct mv88e6390_serdes_hw_stat {};

static struct mv88e6390_serdes_hw_stat mv88e6390_serdes_hw_stats[] =;

int mv88e6390_serdes_get_sset_count(struct mv88e6xxx_chip *chip, int port)
{}

int mv88e6390_serdes_get_strings(struct mv88e6xxx_chip *chip,
				 int port, uint8_t *data)
{}

static uint64_t mv88e6390_serdes_get_stat(struct mv88e6xxx_chip *chip, int lane,
					  struct mv88e6390_serdes_hw_stat *stat)
{}

size_t mv88e6390_serdes_get_stats(struct mv88e6xxx_chip *chip, int port,
				  uint64_t *data)
{}

unsigned int mv88e6390_serdes_irq_mapping(struct mv88e6xxx_chip *chip, int port)
{}

static const u16 mv88e6390_serdes_regs[] =;

int mv88e6390_serdes_get_regs_len(struct mv88e6xxx_chip *chip, int port)
{}

void mv88e6390_serdes_get_regs(struct mv88e6xxx_chip *chip, int port, void *_p)
{}

static const int mv88e6352_serdes_p2p_to_reg[] =;

int mv88e6352_serdes_set_tx_amplitude(struct mv88e6xxx_chip *chip, int port,
				      int val)
{}