linux/drivers/net/dsa/mv88e6xxx/ptp.c

// SPDX-License-Identifier: GPL-2.0-or-later
/*
 * Marvell 88E6xxx Switch PTP support
 *
 * Copyright (c) 2008 Marvell Semiconductor
 *
 * Copyright (c) 2017 National Instruments
 *      Erik Hons <[email protected]>
 *      Brandon Streiff <[email protected]>
 *      Dane Wagner <[email protected]>
 */

#include "chip.h"
#include "global1.h"
#include "global2.h"
#include "hwtstamp.h"
#include "ptp.h"

#define MV88E6XXX_MAX_ADJ_PPB …

/* Family MV88E6250:
 * Raw timestamps are in units of 10-ns clock periods.
 *
 * clkadj = scaled_ppm * 10*2^28 / (10^6 * 2^16)
 * simplifies to
 * clkadj = scaled_ppm * 2^7 / 5^5
 */
#define MV88E6250_CC_SHIFT …
#define MV88E6250_CC_MULT …
#define MV88E6250_CC_MULT_NUM …
#define MV88E6250_CC_MULT_DEM …

/* Other families:
 * Raw timestamps are in units of 8-ns clock periods.
 *
 * clkadj = scaled_ppm * 8*2^28 / (10^6 * 2^16)
 * simplifies to
 * clkadj = scaled_ppm * 2^9 / 5^6
 */
#define MV88E6XXX_CC_SHIFT …
#define MV88E6XXX_CC_MULT …
#define MV88E6XXX_CC_MULT_NUM …
#define MV88E6XXX_CC_MULT_DEM …

#define TAI_EVENT_WORK_INTERVAL …

#define cc_to_chip(cc) …
#define dw_overflow_to_chip(dw) …
#define dw_tai_event_to_chip(dw) …

static int mv88e6xxx_tai_read(struct mv88e6xxx_chip *chip, int addr,
			      u16 *data, int len)
{ … }

static int mv88e6xxx_tai_write(struct mv88e6xxx_chip *chip, int addr, u16 data)
{ … }

/* TODO: places where this are called should be using pinctrl */
static int mv88e6352_set_gpio_func(struct mv88e6xxx_chip *chip, int pin,
				   int func, int input)
{ … }

static u64 mv88e6352_ptp_clock_read(const struct cyclecounter *cc)
{ … }

static u64 mv88e6165_ptp_clock_read(const struct cyclecounter *cc)
{ … }

/* mv88e6352_config_eventcap - configure TAI event capture
 * @event: PTP_CLOCK_PPS (internal) or PTP_CLOCK_EXTTS (external)
 * @rising: zero for falling-edge trigger, else rising-edge trigger
 *
 * This will also reset the capture sequence counter.
 */
static int mv88e6352_config_eventcap(struct mv88e6xxx_chip *chip, int event,
				     int rising)
{ … }

static void mv88e6352_tai_event_work(struct work_struct *ugly)
{ … }

static int mv88e6xxx_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)
{ … }

static int mv88e6xxx_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
{ … }

static int mv88e6xxx_ptp_gettime(struct ptp_clock_info *ptp,
				 struct timespec64 *ts)
{ … }

static int mv88e6xxx_ptp_settime(struct ptp_clock_info *ptp,
				 const struct timespec64 *ts)
{ … }

static int mv88e6352_ptp_enable_extts(struct mv88e6xxx_chip *chip,
				      struct ptp_clock_request *rq, int on)
{ … }

static int mv88e6352_ptp_enable(struct ptp_clock_info *ptp,
				struct ptp_clock_request *rq, int on)
{ … }

static int mv88e6352_ptp_verify(struct ptp_clock_info *ptp, unsigned int pin,
				enum ptp_pin_function func, unsigned int chan)
{ … }

const struct mv88e6xxx_ptp_ops mv88e6165_ptp_ops = …;

const struct mv88e6xxx_ptp_ops mv88e6250_ptp_ops = …;

const struct mv88e6xxx_ptp_ops mv88e6352_ptp_ops = …;

const struct mv88e6xxx_ptp_ops mv88e6390_ptp_ops = …;

static u64 mv88e6xxx_ptp_clock_read(const struct cyclecounter *cc)
{ … }

/* With a 125MHz input clock, the 32-bit timestamp counter overflows in ~34.3
 * seconds; this task forces periodic reads so that we don't miss any.
 */
#define MV88E6XXX_TAI_OVERFLOW_PERIOD …
static void mv88e6xxx_ptp_overflow_check(struct work_struct *work)
{ … }

int mv88e6xxx_ptp_setup(struct mv88e6xxx_chip *chip)
{ … }

void mv88e6xxx_ptp_free(struct mv88e6xxx_chip *chip)
{ … }