linux/include/soc/mscc/ocelot_qsys.h

/* SPDX-License-Identifier: (GPL-2.0 OR MIT) */
/*
 * Microsemi Ocelot Switch driver
 *
 * Copyright (c) 2017 Microsemi Corporation
 */

#ifndef _MSCC_OCELOT_QSYS_H_
#define _MSCC_OCELOT_QSYS_H_

#define QSYS_PORT_MODE_RSZ

#define QSYS_PORT_MODE_DEQUEUE_DIS
#define QSYS_PORT_MODE_DEQUEUE_LATE

#define QSYS_STAT_CNT_CFG_TX_GREEN_CNT_MODE
#define QSYS_STAT_CNT_CFG_TX_YELLOW_CNT_MODE
#define QSYS_STAT_CNT_CFG_DROP_GREEN_CNT_MODE
#define QSYS_STAT_CNT_CFG_DROP_YELLOW_CNT_MODE
#define QSYS_STAT_CNT_CFG_DROP_COUNT_ONCE
#define QSYS_STAT_CNT_CFG_DROP_COUNT_EGRESS

#define QSYS_EEE_CFG_RSZ

#define QSYS_EEE_THRES_EEE_HIGH_BYTES(x)
#define QSYS_EEE_THRES_EEE_HIGH_BYTES_M
#define QSYS_EEE_THRES_EEE_HIGH_BYTES_X(x)
#define QSYS_EEE_THRES_EEE_HIGH_FRAMES(x)
#define QSYS_EEE_THRES_EEE_HIGH_FRAMES_M

#define QSYS_SW_STATUS_RSZ

#define QSYS_EXT_CPU_CFG_EXT_CPU_PORT(x)
#define QSYS_EXT_CPU_CFG_EXT_CPU_PORT_M
#define QSYS_EXT_CPU_CFG_EXT_CPU_PORT_X(x)
#define QSYS_EXT_CPU_CFG_EXT_CPUQ_MSK(x)
#define QSYS_EXT_CPU_CFG_EXT_CPUQ_MSK_M

#define QSYS_QMAP_GSZ

#define QSYS_QMAP_SE_BASE(x)
#define QSYS_QMAP_SE_BASE_M
#define QSYS_QMAP_SE_BASE_X(x)
#define QSYS_QMAP_SE_IDX_SEL(x)
#define QSYS_QMAP_SE_IDX_SEL_M
#define QSYS_QMAP_SE_IDX_SEL_X(x)
#define QSYS_QMAP_SE_INP_SEL(x)
#define QSYS_QMAP_SE_INP_SEL_M

#define QSYS_ISDX_SGRP_GSZ

#define QSYS_TIMED_FRAME_ENTRY_GSZ

#define QSYS_TFRM_MISC_TIMED_CANCEL_SLOT(x)
#define QSYS_TFRM_MISC_TIMED_CANCEL_SLOT_M
#define QSYS_TFRM_MISC_TIMED_CANCEL_SLOT_X(x)
#define QSYS_TFRM_MISC_TIMED_CANCEL_1SHOT
#define QSYS_TFRM_MISC_TIMED_SLOT_MODE_MC
#define QSYS_TFRM_MISC_TIMED_ENTRY_FAST_CNT(x)
#define QSYS_TFRM_MISC_TIMED_ENTRY_FAST_CNT_M

#define QSYS_RED_PROFILE_RSZ

#define QSYS_RED_PROFILE_WM_RED_LOW(x)
#define QSYS_RED_PROFILE_WM_RED_LOW_M
#define QSYS_RED_PROFILE_WM_RED_LOW_X(x)
#define QSYS_RED_PROFILE_WM_RED_HIGH(x)
#define QSYS_RED_PROFILE_WM_RED_HIGH_M

#define QSYS_RES_CFG_GSZ

#define QSYS_RES_STAT_GSZ

#define QSYS_MMGT_EQ_CTRL_FP_FREE_CNT(x)
#define QSYS_MMGT_EQ_CTRL_FP_FREE_CNT_M

#define QSYS_EVENTS_CORE_EV_FDC(x)
#define QSYS_EVENTS_CORE_EV_FDC_M
#define QSYS_EVENTS_CORE_EV_FDC_X(x)
#define QSYS_EVENTS_CORE_EV_FRD(x)
#define QSYS_EVENTS_CORE_EV_FRD_M

#define QSYS_QMAXSDU_CFG_0_RSZ

#define QSYS_QMAXSDU_CFG_1_RSZ

#define QSYS_QMAXSDU_CFG_2_RSZ

#define QSYS_QMAXSDU_CFG_3_RSZ

#define QSYS_QMAXSDU_CFG_4_RSZ

#define QSYS_QMAXSDU_CFG_5_RSZ

#define QSYS_QMAXSDU_CFG_6_RSZ

#define QSYS_QMAXSDU_CFG_7_RSZ

#define QSYS_PREEMPTION_CFG_RSZ

#define QSYS_PREEMPTION_CFG_P_QUEUES(x)
#define QSYS_PREEMPTION_CFG_P_QUEUES_M
#define QSYS_PREEMPTION_CFG_MM_ADD_FRAG_SIZE(x)
#define QSYS_PREEMPTION_CFG_MM_ADD_FRAG_SIZE_M
#define QSYS_PREEMPTION_CFG_MM_ADD_FRAG_SIZE_X(x)
#define QSYS_PREEMPTION_CFG_STRICT_IPG(x)
#define QSYS_PREEMPTION_CFG_STRICT_IPG_M
#define QSYS_PREEMPTION_CFG_STRICT_IPG_X(x)
#define QSYS_PREEMPTION_CFG_HOLD_ADVANCE(x)
#define QSYS_PREEMPTION_CFG_HOLD_ADVANCE_M
#define QSYS_PREEMPTION_CFG_HOLD_ADVANCE_X(x)

#define QSYS_CIR_CFG_GSZ

#define QSYS_CIR_CFG_CIR_RATE(x)
#define QSYS_CIR_CFG_CIR_RATE_M
#define QSYS_CIR_CFG_CIR_RATE_X(x)
#define QSYS_CIR_CFG_CIR_BURST(x)
#define QSYS_CIR_CFG_CIR_BURST_M

#define QSYS_EIR_CFG_GSZ

#define QSYS_EIR_CFG_EIR_RATE(x)
#define QSYS_EIR_CFG_EIR_RATE_M
#define QSYS_EIR_CFG_EIR_RATE_X(x)
#define QSYS_EIR_CFG_EIR_BURST(x)
#define QSYS_EIR_CFG_EIR_BURST_M
#define QSYS_EIR_CFG_EIR_BURST_X(x)
#define QSYS_EIR_CFG_EIR_MARK_ENA

#define QSYS_SE_CFG_GSZ

#define QSYS_SE_CFG_SE_DWRR_CNT(x)
#define QSYS_SE_CFG_SE_DWRR_CNT_M
#define QSYS_SE_CFG_SE_DWRR_CNT_X(x)
#define QSYS_SE_CFG_SE_RR_ENA
#define QSYS_SE_CFG_SE_AVB_ENA
#define QSYS_SE_CFG_SE_FRM_MODE(x)
#define QSYS_SE_CFG_SE_FRM_MODE_M
#define QSYS_SE_CFG_SE_FRM_MODE_X(x)
#define QSYS_SE_CFG_SE_EXC_ENA
#define QSYS_SE_CFG_SE_EXC_FWD

#define QSYS_SE_DWRR_CFG_GSZ
#define QSYS_SE_DWRR_CFG_RSZ

#define QSYS_SE_CONNECT_GSZ

#define QSYS_SE_CONNECT_SE_OUTP_IDX(x)
#define QSYS_SE_CONNECT_SE_OUTP_IDX_M
#define QSYS_SE_CONNECT_SE_OUTP_IDX_X(x)
#define QSYS_SE_CONNECT_SE_INP_IDX(x)
#define QSYS_SE_CONNECT_SE_INP_IDX_M
#define QSYS_SE_CONNECT_SE_INP_IDX_X(x)
#define QSYS_SE_CONNECT_SE_OUTP_CON(x)
#define QSYS_SE_CONNECT_SE_OUTP_CON_M
#define QSYS_SE_CONNECT_SE_OUTP_CON_X(x)
#define QSYS_SE_CONNECT_SE_INP_CNT(x)
#define QSYS_SE_CONNECT_SE_INP_CNT_M
#define QSYS_SE_CONNECT_SE_INP_CNT_X(x)
#define QSYS_SE_CONNECT_SE_TERMINAL

#define QSYS_SE_DLB_SENSE_GSZ

#define QSYS_SE_DLB_SENSE_SE_DLB_PRIO(x)
#define QSYS_SE_DLB_SENSE_SE_DLB_PRIO_M
#define QSYS_SE_DLB_SENSE_SE_DLB_PRIO_X(x)
#define QSYS_SE_DLB_SENSE_SE_DLB_SPORT(x)
#define QSYS_SE_DLB_SENSE_SE_DLB_SPORT_M
#define QSYS_SE_DLB_SENSE_SE_DLB_SPORT_X(x)
#define QSYS_SE_DLB_SENSE_SE_DLB_DPORT(x)
#define QSYS_SE_DLB_SENSE_SE_DLB_DPORT_M
#define QSYS_SE_DLB_SENSE_SE_DLB_DPORT_X(x)
#define QSYS_SE_DLB_SENSE_SE_DLB_PRIO_ENA
#define QSYS_SE_DLB_SENSE_SE_DLB_SPORT_ENA
#define QSYS_SE_DLB_SENSE_SE_DLB_DPORT_ENA

#define QSYS_CIR_STATE_GSZ

#define QSYS_CIR_STATE_CIR_LVL(x)
#define QSYS_CIR_STATE_CIR_LVL_M
#define QSYS_CIR_STATE_CIR_LVL_X(x)
#define QSYS_CIR_STATE_SHP_TIME(x)
#define QSYS_CIR_STATE_SHP_TIME_M

#define QSYS_EIR_STATE_GSZ

#define QSYS_SE_STATE_GSZ

#define QSYS_SE_STATE_SE_OUTP_LVL(x)
#define QSYS_SE_STATE_SE_OUTP_LVL_M
#define QSYS_SE_STATE_SE_OUTP_LVL_X(x)
#define QSYS_SE_STATE_SE_WAS_YEL

#define QSYS_HSCH_MISC_CFG_SE_CONNECT_VLD
#define QSYS_HSCH_MISC_CFG_FRM_ADJ(x)
#define QSYS_HSCH_MISC_CFG_FRM_ADJ_M
#define QSYS_HSCH_MISC_CFG_FRM_ADJ_X(x)
#define QSYS_HSCH_MISC_CFG_LEAK_DIS
#define QSYS_HSCH_MISC_CFG_QSHP_EXC_ENA
#define QSYS_HSCH_MISC_CFG_PFC_BYP_UPD

#define QSYS_TAG_CONFIG_RSZ

#define QSYS_TAG_CONFIG_ENABLE
#define QSYS_TAG_CONFIG_LINK_SPEED(x)
#define QSYS_TAG_CONFIG_LINK_SPEED_M
#define QSYS_TAG_CONFIG_LINK_SPEED_X(x)
#define QSYS_TAG_CONFIG_INIT_GATE_STATE(x)
#define QSYS_TAG_CONFIG_INIT_GATE_STATE_M
#define QSYS_TAG_CONFIG_INIT_GATE_STATE_X(x)
#define QSYS_TAG_CONFIG_SCH_TRAFFIC_QUEUES(x)
#define QSYS_TAG_CONFIG_SCH_TRAFFIC_QUEUES_M
#define QSYS_TAG_CONFIG_SCH_TRAFFIC_QUEUES_X(x)

#define QSYS_TAS_PARAM_CFG_CTRL_PORT_NUM(x)
#define QSYS_TAS_PARAM_CFG_CTRL_PORT_NUM_M
#define QSYS_TAS_PARAM_CFG_CTRL_ALWAYS_GUARD_BAND_SCH_Q
#define QSYS_TAS_PARAM_CFG_CTRL_CONFIG_CHANGE

#define QSYS_PORT_MAX_SDU_RSZ

#define QSYS_PARAM_CFG_REG_3_BASE_TIME_SEC_MSB(x)
#define QSYS_PARAM_CFG_REG_3_BASE_TIME_SEC_MSB_M
#define QSYS_PARAM_CFG_REG_3_LIST_LENGTH(x)
#define QSYS_PARAM_CFG_REG_3_LIST_LENGTH_M
#define QSYS_PARAM_CFG_REG_3_LIST_LENGTH_X(x)

#define QSYS_GCL_CFG_REG_1_GCL_ENTRY_NUM(x)
#define QSYS_GCL_CFG_REG_1_GCL_ENTRY_NUM_M
#define QSYS_GCL_CFG_REG_1_GATE_STATE(x)
#define QSYS_GCL_CFG_REG_1_GATE_STATE_M
#define QSYS_GCL_CFG_REG_1_GATE_STATE_X(x)

#define QSYS_PARAM_STATUS_REG_3_BASE_TIME_SEC_MSB(x)
#define QSYS_PARAM_STATUS_REG_3_BASE_TIME_SEC_MSB_M
#define QSYS_PARAM_STATUS_REG_3_LIST_LENGTH(x)
#define QSYS_PARAM_STATUS_REG_3_LIST_LENGTH_M
#define QSYS_PARAM_STATUS_REG_3_LIST_LENGTH_X(x)

#define QSYS_PARAM_STATUS_REG_8_CFG_CHG_TIME_SEC_MSB(x)
#define QSYS_PARAM_STATUS_REG_8_CFG_CHG_TIME_SEC_MSB_M
#define QSYS_PARAM_STATUS_REG_8_OPER_GATE_STATE(x)
#define QSYS_PARAM_STATUS_REG_8_OPER_GATE_STATE_M
#define QSYS_PARAM_STATUS_REG_8_OPER_GATE_STATE_X(x)
#define QSYS_PARAM_STATUS_REG_8_CONFIG_PENDING

#define QSYS_GCL_STATUS_REG_1_GCL_ENTRY_NUM(x)
#define QSYS_GCL_STATUS_REG_1_GCL_ENTRY_NUM_M
#define QSYS_GCL_STATUS_REG_1_GATE_STATE(x)
#define QSYS_GCL_STATUS_REG_1_GATE_STATE_M
#define QSYS_GCL_STATUS_REG_1_GATE_STATE_X(x)

#endif