/* SPDX-License-Identifier: GPL-2.0 */ #ifndef _SLIC_H #define _SLIC_H #include <linux/types.h> #include <linux/netdevice.h> #include <linux/spinlock_types.h> #include <linux/dma-mapping.h> #include <linux/pci.h> #include <linux/list.h> #include <linux/u64_stats_sync.h> #define SLIC_VGBSTAT_XPERR … #define SLIC_VGBSTAT_XERRSHFT … #define SLIC_VGBSTAT_XCSERR … #define SLIC_VGBSTAT_XUFLOW … #define SLIC_VGBSTAT_XHLEN … #define SLIC_VGBSTAT_NETERR … #define SLIC_VGBSTAT_NERRSHFT … #define SLIC_VGBSTAT_NERRMSK … #define SLIC_VGBSTAT_NCSERR … #define SLIC_VGBSTAT_NUFLOW … #define SLIC_VGBSTAT_NHLEN … #define SLIC_VGBSTAT_LNKERR … #define SLIC_VGBSTAT_LERRMSK … #define SLIC_VGBSTAT_LDEARLY … #define SLIC_VGBSTAT_LBOFLO … #define SLIC_VGBSTAT_LCODERR … #define SLIC_VGBSTAT_LDBLNBL … #define SLIC_VGBSTAT_LCRCERR … #define SLIC_VGBSTAT_LOFLO … #define SLIC_VGBSTAT_LUFLO … #define SLIC_IRHDDR_FLEN_MSK … #define SLIC_IRHDDR_SVALID … #define SLIC_IRHDDR_ERR … #define SLIC_VRHSTAT_802OE … #define SLIC_VRHSTAT_TPOFLO … #define SLIC_VRHSTATB_802UE … #define SLIC_VRHSTATB_RCVE … #define SLIC_VRHSTATB_BUFF … #define SLIC_VRHSTATB_CARRE … #define SLIC_VRHSTATB_LONGE … #define SLIC_VRHSTATB_PREA … #define SLIC_VRHSTATB_CRC … #define SLIC_VRHSTATB_DRBL … #define SLIC_VRHSTATB_CODE … #define SLIC_VRHSTATB_TPCSUM … #define SLIC_VRHSTATB_TPHLEN … #define SLIC_VRHSTATB_IPCSUM … #define SLIC_VRHSTATB_IPLERR … #define SLIC_VRHSTATB_IPHERR … #define SLIC_CMD_XMT_REQ … #define SLIC_CMD_TYPE_DUMB … #define SLIC_RESET_MAGIC … #define SLIC_ICR_INT_OFF … #define SLIC_ICR_INT_ON … #define SLIC_ICR_INT_MASK … #define SLIC_ISR_ERR … #define SLIC_ISR_RCV … #define SLIC_ISR_CMD … #define SLIC_ISR_IO … #define SLIC_ISR_UPC … #define SLIC_ISR_LEVENT … #define SLIC_ISR_RMISS … #define SLIC_ISR_UPCERR … #define SLIC_ISR_XDROP … #define SLIC_ISR_UPCBSY … #define SLIC_ISR_PING_MASK … #define SLIC_ISR_UPCERR_MASK … #define SLIC_ISR_UPC_MASK … #define SLIC_WCS_START … #define SLIC_WCS_COMPARE … #define SLIC_RCVWCS_BEGIN … #define SLIC_RCVWCS_FINISH … #define SLIC_MIICR_REG_16 … #define SLIC_MRV_REG16_XOVERON … #define SLIC_GIG_LINKUP … #define SLIC_GIG_FULLDUPLEX … #define SLIC_GIG_SPEED_MASK … #define SLIC_GIG_SPEED_1000 … #define SLIC_GIG_SPEED_100 … #define SLIC_GIG_SPEED_10 … #define SLIC_GMCR_RESET … #define SLIC_GMCR_GBIT … #define SLIC_GMCR_FULLD … #define SLIC_GMCR_GAPBB_SHIFT … #define SLIC_GMCR_GAPR1_SHIFT … #define SLIC_GMCR_GAPR2_SHIFT … #define SLIC_GMCR_GAPBB_1000 … #define SLIC_GMCR_GAPR1_1000 … #define SLIC_GMCR_GAPR2_1000 … #define SLIC_GMCR_GAPBB_100 … #define SLIC_GMCR_GAPR1_100 … #define SLIC_GMCR_GAPR2_100 … #define SLIC_XCR_RESET … #define SLIC_XCR_XMTEN … #define SLIC_XCR_PAUSEEN … #define SLIC_XCR_LOADRNG … #define SLIC_GXCR_RESET … #define SLIC_GXCR_XMTEN … #define SLIC_GXCR_PAUSEEN … #define SLIC_GRCR_RESET … #define SLIC_GRCR_RCVEN … #define SLIC_GRCR_RCVALL … #define SLIC_GRCR_RCVBAD … #define SLIC_GRCR_CTLEN … #define SLIC_GRCR_ADDRAEN … #define SLIC_GRCR_HASHSIZE_SHIFT … #define SLIC_GRCR_HASHSIZE … /* Reset Register */ #define SLIC_REG_RESET … /* Interrupt Control Register */ #define SLIC_REG_ICR … /* Interrupt status pointer */ #define SLIC_REG_ISP … /* Interrupt status */ #define SLIC_REG_ISR … /* Header buffer address reg * 31-8 - phy addr of set of contiguous hdr buffers * 7-0 - number of buffers passed * Buffers are 256 bytes long on 256-byte boundaries. */ #define SLIC_REG_HBAR … /* Data buffer handle & address reg * 4 sets of registers; Buffers are 2K bytes long 2 per 4K page. */ #define SLIC_REG_DBAR … /* Xmt Cmd buf addr regs. * 1 per XMT interface * 31-5 - phy addr of host command buffer * 4-0 - length of cmd in multiples of 32 bytes * Buffers are 32 bytes up to 512 bytes long */ #define SLIC_REG_CBAR … /* Write control store */ #define SLIC_REG_WCS … /*Response buffer address reg. * 31-8 - phy addr of set of contiguous response buffers * 7-0 - number of buffers passed * Buffers are 32 bytes long on 32-byte boundaries. */ #define SLIC_REG_RBAR … /* Read statistics (UPR) */ #define SLIC_REG_RSTAT … /* Read link status */ #define SLIC_REG_LSTAT … /* Write Mac Config */ #define SLIC_REG_WMCFG … /* Write phy register */ #define SLIC_REG_WPHY … /* Rcv Cmd buf addr reg */ #define SLIC_REG_RCBAR … /* Read SLIC Config*/ #define SLIC_REG_RCONFIG … /* Interrupt aggregation time */ #define SLIC_REG_INTAGG … /* Write XMIT config reg */ #define SLIC_REG_WXCFG … /* Write RCV config reg */ #define SLIC_REG_WRCFG … /* Write rcv addr a low */ #define SLIC_REG_WRADDRAL … /* Write rcv addr a high */ #define SLIC_REG_WRADDRAH … /* Write rcv addr b low */ #define SLIC_REG_WRADDRBL … /* Write rcv addr b high */ #define SLIC_REG_WRADDRBH … /* Low bits of mcast mask */ #define SLIC_REG_MCASTLOW … /* High bits of mcast mask */ #define SLIC_REG_MCASTHIGH … /* Ping the card */ #define SLIC_REG_PING … /* Dump command */ #define SLIC_REG_DUMP_CMD … /* Dump data pointer */ #define SLIC_REG_DUMP_DATA … /* Read card's pci_status register */ #define SLIC_REG_PCISTATUS … /* Write hostid field */ #define SLIC_REG_WRHOSTID … /* Put card in a low power state */ #define SLIC_REG_LOW_POWER … /* Force slic into quiescent state before soft reset */ #define SLIC_REG_QUIESCE … /* Reset interface queues */ #define SLIC_REG_RESET_IFACE … /* Register is only written when it has changed. * Bits 63-32 for host i/f addrs. */ #define SLIC_REG_ADDR_UPPER … /* 64 bit Header buffer address reg */ #define SLIC_REG_HBAR64 … /* 64 bit Data buffer handle & address reg */ #define SLIC_REG_DBAR64 … /* 64 bit Xmt Cmd buf addr regs. */ #define SLIC_REG_CBAR64 … /* 64 bit Response buffer address reg.*/ #define SLIC_REG_RBAR64 … /* 64 bit Rcv Cmd buf addr reg*/ #define SLIC_REG_RCBAR64 … /* Read statistics (64 bit UPR) */ #define SLIC_REG_RSTAT64 … /* Download Gigabit RCV sequencer ucode */ #define SLIC_REG_RCV_WCS … /* Write VlanId field */ #define SLIC_REG_WRVLANID … /* Read Transformer info */ #define SLIC_REG_READ_XF_INFO … /* Write Transformer info */ #define SLIC_REG_WRITE_XF_INFO … /* Write card ticks per second */ #define SLIC_REG_TICKS_PER_SEC … #define SLIC_REG_HOSTID … #define PCI_VENDOR_ID_ALACRITECH … #define PCI_DEVICE_ID_ALACRITECH_MOJAVE … #define PCI_SUBDEVICE_ID_ALACRITECH_1000X1 … #define PCI_SUBDEVICE_ID_ALACRITECH_1000X1_2 … #define PCI_SUBDEVICE_ID_ALACRITECH_1000X1F … #define PCI_SUBDEVICE_ID_ALACRITECH_CICADA … #define PCI_SUBDEVICE_ID_ALACRITECH_SES1001T … #define PCI_SUBDEVICE_ID_ALACRITECH_SES1001F … #define PCI_DEVICE_ID_ALACRITECH_OASIS … #define PCI_SUBDEVICE_ID_ALACRITECH_SEN2002XT … #define PCI_SUBDEVICE_ID_ALACRITECH_SEN2002XF … #define PCI_SUBDEVICE_ID_ALACRITECH_SEN2001XT … #define PCI_SUBDEVICE_ID_ALACRITECH_SEN2001XF … #define PCI_SUBDEVICE_ID_ALACRITECH_SEN2104EF … #define PCI_SUBDEVICE_ID_ALACRITECH_SEN2104ET … #define PCI_SUBDEVICE_ID_ALACRITECH_SEN2102EF … #define PCI_SUBDEVICE_ID_ALACRITECH_SEN2102ET … /* Note: power of two required for number descriptors */ #define SLIC_NUM_RX_LES … #define SLIC_RX_BUFF_SIZE … #define SLIC_RX_BUFF_ALIGN … #define SLIC_RX_BUFF_HDR_SIZE … #define SLIC_MAX_REQ_RX_DESCS … #define SLIC_NUM_TX_DESCS … #define SLIC_TX_DESC_ALIGN … #define SLIC_MIN_TX_WAKEUP_DESCS … #define SLIC_MAX_REQ_TX_DESCS … #define SLIC_MAX_TX_COMPLETIONS … #define SLIC_NUM_STAT_DESCS … #define SLIC_STATS_DESC_ALIGN … #define SLIC_NUM_STAT_DESC_ARRAYS … #define SLIC_INVALID_STAT_DESC_IDX … #define SLIC_UPR_LSTAT … #define SLIC_UPR_CONFIG … #define SLIC_EEPROM_SIZE … #define SLIC_EEPROM_MAGIC … #define SLIC_FIRMWARE_MOJAVE … #define SLIC_FIRMWARE_OASIS … #define SLIC_RCV_FIRMWARE_MOJAVE … #define SLIC_RCV_FIRMWARE_OASIS … #define SLIC_FIRMWARE_MIN_SIZE … #define SLIC_FIRMWARE_MAX_SECTIONS … #define SLIC_MODEL_MOJAVE … #define SLIC_MODEL_OASIS … #define SLIC_INC_STATS_COUNTER(st, counter) … #define SLIC_GET_STATS_COUNTER(newst, st, counter) … struct slic_upr { … }; struct slic_upr_list { … }; /* SLIC EEPROM structure for Mojave */ struct slic_mojave_eeprom { … }; /* SLIC EEPROM structure for Oasis */ struct slic_oasis_eeprom { … }; struct slic_stats { … }; struct slic_shmem_data { … }; struct slic_shmem { … }; struct slic_rx_info_oasis { … }; struct slic_rx_info_mojave { … }; struct slic_stat_desc { … }; struct slic_stat_queue { … }; struct slic_tx_desc { … }; struct slic_tx_buffer { … }; struct slic_tx_queue { … }; struct slic_rx_desc { … }; struct slic_rx_buffer { … }; struct slic_rx_queue { … }; struct slic_device { … }; static inline u32 slic_read(struct slic_device *sdev, unsigned int reg) { … } static inline void slic_write(struct slic_device *sdev, unsigned int reg, u32 val) { … } static inline void slic_flush_write(struct slic_device *sdev) { … } #endif /* _SLIC_H */
Codebase Browser
linux