linux/drivers/net/ethernet/apm/xgene/xgene_enet_cle.h

/* SPDX-License-Identifier: GPL-2.0-or-later */
/* Applied Micro X-Gene SoC Ethernet Classifier structures
 *
 * Copyright (c) 2016, Applied Micro Circuits Corporation
 * Authors: Khuong Dinh <[email protected]>
 *          Tanmay Inamdar <[email protected]>
 *          Iyappan Subramanian <[email protected]>
 */

#ifndef __XGENE_ENET_CLE_H__
#define __XGENE_ENET_CLE_H__

#include <linux/io.h>
#include <linux/random.h>

/* Register offsets */
#define INDADDR
#define INDCMD
#define INDCMD_STATUS
#define DATA_RAM0
#define SNPTR0
#define SPPTR0
#define DFCLSRESDBPTR0
#define DFCLSRESDB00
#define RSS_CTRL0

#define CLE_CMD_TO
#define CLE_PKTRAM_SIZE
#define CLE_PORT_OFFSET
#define CLE_DRAM_REGS

#define CLE_DN_TYPE_LEN
#define CLE_DN_TYPE_POS
#define CLE_DN_LASTN_LEN
#define CLE_DN_LASTN_POS
#define CLE_DN_HLS_LEN
#define CLE_DN_HLS_POS
#define CLE_DN_EXT_LEN
#define CLE_DN_EXT_POS
#define CLE_DN_BSTOR_LEN
#define CLE_DN_BSTOR_POS
#define CLE_DN_SBSTOR_LEN
#define CLE_DN_SBSTOR_POS
#define CLE_DN_RPTR_LEN
#define CLE_DN_RPTR_POS

#define CLE_BR_VALID_LEN
#define CLE_BR_VALID_POS
#define CLE_BR_NPPTR_LEN
#define CLE_BR_NPPTR_POS
#define CLE_BR_JB_LEN
#define CLE_BR_JB_POS
#define CLE_BR_JR_LEN
#define CLE_BR_JR_POS
#define CLE_BR_OP_LEN
#define CLE_BR_OP_POS
#define CLE_BR_NNODE_LEN
#define CLE_BR_NNODE_POS
#define CLE_BR_NBR_LEN
#define CLE_BR_NBR_POS

#define CLE_BR_DATA_LEN
#define CLE_BR_DATA_POS
#define CLE_BR_MASK_LEN
#define CLE_BR_MASK_POS

#define CLE_KN_PRIO_POS
#define CLE_KN_PRIO_LEN
#define CLE_KN_RPTR_POS
#define CLE_KN_RPTR_LEN
#define CLE_TYPE_POS
#define CLE_TYPE_LEN

#define CLE_DROP_POS
#define CLE_DROP_LEN
#define CLE_DSTQIDL_POS
#define CLE_DSTQIDL_LEN
#define CLE_DSTQIDH_POS
#define CLE_DSTQIDH_LEN
#define CLE_FPSEL_POS
#define CLE_FPSEL_LEN
#define CLE_NFPSEL_POS
#define CLE_NFPSEL_LEN
#define CLE_PRIORITY_POS
#define CLE_PRIORITY_LEN

#define JMP_ABS
#define JMP_REL
#define JMP_FW
#define JMP_BW

enum xgene_cle_ptree_nodes {};

enum xgene_cle_byte_store {};

/* Preclassification operation types */
enum xgene_cle_node_type {};

/* Preclassification operation types */
enum xgene_cle_op_type {};

enum xgene_cle_parser {};

#define XGENE_CLE_DRAM(type)
enum xgene_cle_dram_type {};

enum xgene_cle_cmd_type {};

enum xgene_cle_ipv4_rss_hashtype {};

enum xgene_cle_prot_type {};

enum xgene_cle_prot_version {};

enum xgene_cle_ptree_dbptrs {};

/* RSS sideband signal info */
#define SB_IPFRAG_POS
#define SB_IPFRAG_LEN
#define SB_IPPROT_POS
#define SB_IPPROT_LEN
#define SB_IPVER_POS
#define SB_IPVER_LEN
#define SB_HDRLEN_POS
#define SB_HDRLEN_LEN

/* RSS indirection table */
#define XGENE_CLE_IDT_ENTRIES
#define IDT_DSTQID_POS
#define IDT_DSTQID_LEN
#define IDT_FPSEL_POS
#define IDT_FPSEL_LEN
#define IDT_NFPSEL_POS
#define IDT_NFPSEL_LEN
#define IDT_FPSEL1_POS
#define IDT_FPSEL1_LEN
#define IDT_NFPSEL1_POS
#define IDT_NFPSEL1_LEN

struct xgene_cle_ptree_branch {};

struct xgene_cle_ptree_ewdn {};

struct xgene_cle_ptree_key {};

struct xgene_cle_ptree_kn {};

struct xgene_cle_dbptr {};

struct xgene_cle_ptree {};

struct xgene_enet_cle {};

extern const struct xgene_cle_ops xgene_cle3in_ops;

#endif /* __XGENE_ENET_CLE_H__ */