/* * Copyright (c) 2013 Johannes Berg <[email protected]> * * This file is free software: you may copy, redistribute and/or modify it * under the terms of the GNU General Public License as published by the * Free Software Foundation, either version 2 of the License, or (at your * option) any later version. * * This file is distributed in the hope that it will be useful, but * WITHOUT ANY WARRANTY; without even the implied warranty of * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU * General Public License for more details. * * You should have received a copy of the GNU General Public License * along with this program. If not, see <http://www.gnu.org/licenses/>. * * This file incorporates work covered by the following copyright and * permission notice: * * Copyright (c) 2012 Qualcomm Atheros, Inc. * * Permission to use, copy, modify, and/or distribute this software for any * purpose with or without fee is hereby granted, provided that the above * copyright notice and this permission notice appear in all copies. * * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES * WITH REGARD TO THIS SOFTWARE INCLUDING ALL IMPLIED WARRANTIES OF * MERCHANTABILITY AND FITNESS. IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR * ANY SPECIAL, DIRECT, INDIRECT, OR CONSEQUENTIAL DAMAGES OR ANY DAMAGES * WHATSOEVER RESULTING FROM LOSS OF USE, DATA OR PROFITS, WHETHER IN AN * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE. */ #ifndef ALX_HW_H_ #define ALX_HW_H_ #include <linux/types.h> #include <linux/mdio.h> #include <linux/pci.h> #include <linux/if_vlan.h> #include "reg.h" /* Transmit Packet Descriptor, contains 4 32-bit words. * * 31 16 0 * +----------------+----------------+ * | vlan-tag | buf length | * +----------------+----------------+ * | Word 1 | * +----------------+----------------+ * | Word 2: buf addr lo | * +----------------+----------------+ * | Word 3: buf addr hi | * +----------------+----------------+ * * Word 2 and 3 combine to form a 64-bit buffer address * * Word 1 has three forms, depending on the state of bit 8/12/13: * if bit8 =='1', the definition is just for custom checksum offload. * if bit8 == '0' && bit12 == '1' && bit13 == '1', the *FIRST* descriptor * for the skb is special for LSO V2, Word 2 become total skb length , * Word 3 is meaningless. * other condition, the definition is for general skb or ip/tcp/udp * checksum or LSO(TSO) offload. * * Here is the depiction: * * 0-+ 0-+ * 1 | 1 | * 2 | 2 | * 3 | Payload offset 3 | L4 header offset * 4 | (7:0) 4 | (7:0) * 5 | 5 | * 6 | 6 | * 7-+ 7-+ * 8 Custom csum enable = 1 8 Custom csum enable = 0 * 9 General IPv4 checksum 9 General IPv4 checksum * 10 General TCP checksum 10 General TCP checksum * 11 General UDP checksum 11 General UDP checksum * 12 Large Send Segment enable 12 Large Send Segment enable * 13 Large Send Segment type 13 Large Send Segment type * 14 VLAN tagged 14 VLAN tagged * 15 Insert VLAN tag 15 Insert VLAN tag * 16 IPv4 packet 16 IPv4 packet * 17 Ethernet frame type 17 Ethernet frame type * 18-+ 18-+ * 19 | 19 | * 20 | 20 | * 21 | Custom csum offset 21 | * 22 | (25:18) 22 | * 23 | 23 | MSS (30:18) * 24 | 24 | * 25-+ 25 | * 26-+ 26 | * 27 | 27 | * 28 | Reserved 28 | * 29 | 29 | * 30-+ 30-+ * 31 End of packet 31 End of packet */ struct alx_txd { … } __packed; /* tpd word 1 */ #define TPD_CXSUMSTART_MASK … #define TPD_CXSUMSTART_SHIFT … #define TPD_L4HDROFFSET_MASK … #define TPD_L4HDROFFSET_SHIFT … #define TPD_CXSUM_EN_MASK … #define TPD_CXSUM_EN_SHIFT … #define TPD_IP_XSUM_MASK … #define TPD_IP_XSUM_SHIFT … #define TPD_TCP_XSUM_MASK … #define TPD_TCP_XSUM_SHIFT … #define TPD_UDP_XSUM_MASK … #define TPD_UDP_XSUM_SHIFT … #define TPD_LSO_EN_MASK … #define TPD_LSO_EN_SHIFT … #define TPD_LSO_V2_MASK … #define TPD_LSO_V2_SHIFT … #define TPD_VLTAGGED_MASK … #define TPD_VLTAGGED_SHIFT … #define TPD_INS_VLTAG_MASK … #define TPD_INS_VLTAG_SHIFT … #define TPD_IPV4_MASK … #define TPD_IPV4_SHIFT … #define TPD_ETHTYPE_MASK … #define TPD_ETHTYPE_SHIFT … #define TPD_CXSUMOFFSET_MASK … #define TPD_CXSUMOFFSET_SHIFT … #define TPD_MSS_MASK … #define TPD_MSS_SHIFT … #define TPD_EOP_MASK … #define TPD_EOP_SHIFT … #define DESC_GET(_x, _name) … /* Receive Free Descriptor */ struct alx_rfd { … } __packed; /* Receive Return Descriptor, contains 4 32-bit words. * * 31 16 0 * +----------------+----------------+ * | Word 0 | * +----------------+----------------+ * | Word 1: RSS Hash value | * +----------------+----------------+ * | Word 2 | * +----------------+----------------+ * | Word 3 | * +----------------+----------------+ * * Word 0 depiction & Word 2 depiction: * * 0--+ 0--+ * 1 | 1 | * 2 | 2 | * 3 | 3 | * 4 | 4 | * 5 | 5 | * 6 | 6 | * 7 | IP payload checksum 7 | VLAN tag * 8 | (15:0) 8 | (15:0) * 9 | 9 | * 10 | 10 | * 11 | 11 | * 12 | 12 | * 13 | 13 | * 14 | 14 | * 15-+ 15-+ * 16-+ 16-+ * 17 | Number of RFDs 17 | * 18 | (19:16) 18 | * 19-+ 19 | Protocol ID * 20-+ 20 | (23:16) * 21 | 21 | * 22 | 22 | * 23 | 23-+ * 24 | 24 | Reserved * 25 | Start index of RFD-ring 25-+ * 26 | (31:20) 26 | RSS Q-num (27:25) * 27 | 27-+ * 28 | 28-+ * 29 | 29 | RSS Hash algorithm * 30 | 30 | (31:28) * 31-+ 31-+ * * Word 3 depiction: * * 0--+ * 1 | * 2 | * 3 | * 4 | * 5 | * 6 | * 7 | Packet length (include FCS) * 8 | (13:0) * 9 | * 10 | * 11 | * 12 | * 13-+ * 14 L4 Header checksum error * 15 IPv4 checksum error * 16 VLAN tagged * 17-+ * 18 | Protocol ID (19:17) * 19-+ * 20 Receive error summary * 21 FCS(CRC) error * 22 Frame alignment error * 23 Truncated packet * 24 Runt packet * 25 Incomplete packet due to insufficient rx-desc * 26 Broadcast packet * 27 Multicast packet * 28 Ethernet type (EII or 802.3) * 29 FIFO overflow * 30 Length error (for 802.3, length field mismatch with actual len) * 31 Updated, indicate to driver that this RRD is refreshed. */ struct alx_rrd { … } __packed; /* rrd word 0 */ #define RRD_XSUM_MASK … #define RRD_XSUM_SHIFT … #define RRD_NOR_MASK … #define RRD_NOR_SHIFT … #define RRD_SI_MASK … #define RRD_SI_SHIFT … /* rrd word 2 */ #define RRD_VLTAG_MASK … #define RRD_VLTAG_SHIFT … #define RRD_PID_MASK … #define RRD_PID_SHIFT … /* non-ip packet */ #define RRD_PID_NONIP … /* ipv4(only) */ #define RRD_PID_IPV4 … /* tcp/ipv6 */ #define RRD_PID_IPV6TCP … /* tcp/ipv4 */ #define RRD_PID_IPV4TCP … /* udp/ipv6 */ #define RRD_PID_IPV6UDP … /* udp/ipv4 */ #define RRD_PID_IPV4UDP … /* ipv6(only) */ #define RRD_PID_IPV6 … /* LLDP packet */ #define RRD_PID_LLDP … /* 1588 packet */ #define RRD_PID_1588 … #define RRD_RSSQ_MASK … #define RRD_RSSQ_SHIFT … #define RRD_RSSALG_MASK … #define RRD_RSSALG_SHIFT … #define RRD_RSSALG_TCPV6 … #define RRD_RSSALG_IPV6 … #define RRD_RSSALG_TCPV4 … #define RRD_RSSALG_IPV4 … /* rrd word 3 */ #define RRD_PKTLEN_MASK … #define RRD_PKTLEN_SHIFT … #define RRD_ERR_L4_MASK … #define RRD_ERR_L4_SHIFT … #define RRD_ERR_IPV4_MASK … #define RRD_ERR_IPV4_SHIFT … #define RRD_VLTAGGED_MASK … #define RRD_VLTAGGED_SHIFT … #define RRD_OLD_PID_MASK … #define RRD_OLD_PID_SHIFT … #define RRD_ERR_RES_MASK … #define RRD_ERR_RES_SHIFT … #define RRD_ERR_FCS_MASK … #define RRD_ERR_FCS_SHIFT … #define RRD_ERR_FAE_MASK … #define RRD_ERR_FAE_SHIFT … #define RRD_ERR_TRUNC_MASK … #define RRD_ERR_TRUNC_SHIFT … #define RRD_ERR_RUNT_MASK … #define RRD_ERR_RUNT_SHIFT … #define RRD_ERR_ICMP_MASK … #define RRD_ERR_ICMP_SHIFT … #define RRD_BCAST_MASK … #define RRD_BCAST_SHIFT … #define RRD_MCAST_MASK … #define RRD_MCAST_SHIFT … #define RRD_ETHTYPE_MASK … #define RRD_ETHTYPE_SHIFT … #define RRD_ERR_FIFOV_MASK … #define RRD_ERR_FIFOV_SHIFT … #define RRD_ERR_LEN_MASK … #define RRD_ERR_LEN_SHIFT … #define RRD_UPDATED_MASK … #define RRD_UPDATED_SHIFT … #define ALX_MAX_SETUP_LNK_CYCLE … /* for FlowControl */ #define ALX_FC_RX … #define ALX_FC_TX … #define ALX_FC_ANEG … /* for sleep control */ #define ALX_SLEEP_WOL_PHY … #define ALX_SLEEP_WOL_MAGIC … #define ALX_SLEEP_CIFS … #define ALX_SLEEP_ACTIVE … /* for RSS hash type */ #define ALX_RSS_HASH_TYPE_IPV4 … #define ALX_RSS_HASH_TYPE_IPV4_TCP … #define ALX_RSS_HASH_TYPE_IPV6 … #define ALX_RSS_HASH_TYPE_IPV6_TCP … #define ALX_RSS_HASH_TYPE_ALL … #define ALX_FRAME_PAD … #define ALX_RAW_MTU(_mtu) … #define ALX_MAX_FRAME_LEN(_mtu) … #define ALX_DEF_RXBUF_SIZE … #define ALX_MAX_JUMBO_PKT_SIZE … #define ALX_MAX_TSO_PKT_SIZE … #define ALX_MAX_FRAME_SIZE … #define ALX_MAX_RX_QUEUES … #define ALX_MAX_TX_QUEUES … #define ALX_MAX_HANDLED_INTRS … #define ALX_ISR_MISC … #define ALX_ISR_FATAL … #define ALX_ISR_ALERT … #define ALX_ISR_ALL_QUEUES … /* Statistics counters collected by the MAC * * The order of the fields must match the strings in alx_gstrings_stats * All stats fields should be u64 * See ethtool.c */ struct alx_hw_stats { … }; /* maximum interrupt vectors for msix */ #define ALX_MAX_MSIX_INTRS … #define ALX_GET_FIELD(_data, _field) … #define ALX_SET_FIELD(_data, _field, _value) … struct alx_hw { … }; static inline int alx_hw_revision(struct alx_hw *hw) { … } static inline bool alx_hw_with_cr(struct alx_hw *hw) { … } static inline bool alx_hw_giga(struct alx_hw *hw) { … } static inline void alx_write_mem8(struct alx_hw *hw, u32 reg, u8 val) { … } static inline void alx_write_mem16(struct alx_hw *hw, u32 reg, u16 val) { … } static inline u16 alx_read_mem16(struct alx_hw *hw, u32 reg) { … } static inline void alx_write_mem32(struct alx_hw *hw, u32 reg, u32 val) { … } static inline u32 alx_read_mem32(struct alx_hw *hw, u32 reg) { … } static inline void alx_post_write(struct alx_hw *hw) { … } int alx_get_perm_macaddr(struct alx_hw *hw, u8 *addr); void alx_reset_phy(struct alx_hw *hw); void alx_reset_pcie(struct alx_hw *hw); void alx_enable_aspm(struct alx_hw *hw, bool l0s_en, bool l1_en); int alx_setup_speed_duplex(struct alx_hw *hw, u32 ethadv, u8 flowctrl); void alx_post_phy_link(struct alx_hw *hw); int alx_read_phy_reg(struct alx_hw *hw, u16 reg, u16 *phy_data); int alx_write_phy_reg(struct alx_hw *hw, u16 reg, u16 phy_data); int alx_read_phy_ext(struct alx_hw *hw, u8 dev, u16 reg, u16 *pdata); int alx_write_phy_ext(struct alx_hw *hw, u8 dev, u16 reg, u16 data); int alx_read_phy_link(struct alx_hw *hw); int alx_clear_phy_intr(struct alx_hw *hw); void alx_cfg_mac_flowcontrol(struct alx_hw *hw, u8 fc); void alx_start_mac(struct alx_hw *hw); int alx_reset_mac(struct alx_hw *hw); void alx_set_macaddr(struct alx_hw *hw, const u8 *addr); bool alx_phy_configured(struct alx_hw *hw); void alx_configure_basic(struct alx_hw *hw); void alx_mask_msix(struct alx_hw *hw, int index, bool mask); void alx_disable_rss(struct alx_hw *hw); bool alx_get_phy_info(struct alx_hw *hw); void alx_update_hw_stats(struct alx_hw *hw); static inline u32 alx_speed_to_ethadv(int speed, u8 duplex) { … } #endif
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