linux/drivers/net/ethernet/cavium/thunder/q_struct.h

/* SPDX-License-Identifier: GPL-2.0-only */
/*
 * This file contains HW queue descriptor formats, config register
 * structures etc
 *
 * Copyright (C) 2015 Cavium, Inc.
 */

#ifndef Q_STRUCT_H
#define Q_STRUCT_H

/* Load transaction types for reading segment bytes specified by
 * NIC_SEND_GATHER_S[LD_TYPE].
 */
enum nic_send_ld_type_e {};

enum ether_type_algorithm {};

enum layer3_type {};

enum layer4_type {};

/* CPI and RSSI configuration */
enum cpi_algorithm_type {};

enum rss_algorithm_type {};

enum rss_hash_cfg {};

/* Completion queue entry types */
enum cqe_type {};

enum cqe_rx_tcp_status {};

enum cqe_send_status {};

enum cqe_rx_tcp_end_reason {};

/* Packet protocol level error enumeration */
enum cqe_rx_err_level {};

/* Packet protocol level error type enumeration */
enum cqe_rx_err_opcode {};

struct cqe_rx_t {};

struct cqe_rx_tcp_err_t {};

struct cqe_rx_tcp_t {};

struct cqe_send_t {};

cq_desc_t;

struct rbdr_entry_t {};

/* TCP reassembly context */
struct rbe_tcp_cnxt_t {};

/* Always Big endian */
struct rx_hdr_t {};

enum send_l4_csum_type {};

enum send_crc_alg {};

enum send_load_type {};

enum send_mem_alg_type {};

enum send_mem_dsz_type {};

enum sq_subdesc_type {};

struct sq_crc_subdesc {};

struct sq_gather_subdesc {};

/* SQ immediate subdescriptor */
struct sq_imm_subdesc {};

struct sq_mem_subdesc {};

struct sq_hdr_subdesc {};

/* Queue config register formats */
struct rq_cfg {};

struct cq_cfg {};

struct sq_cfg {};

struct rbdr_cfg {};

struct qs_cfg {};

#endif /* Q_STRUCT_H */