/********************************************************************** * Author: Cavium, Inc. * * Contact: [email protected] * Please include "LiquidIO" in the subject. * * Copyright (c) 2003-2016 Cavium, Inc. * * This file is free software; you can redistribute it and/or modify * it under the terms of the GNU General Public License, Version 2, as * published by the Free Software Foundation. * * This file is distributed in the hope that it will be useful, but * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or * NONINFRINGEMENT. See the GNU General Public License for more details. ***********************************************************************/ /*! \file octeon_config.h * \brief Host Driver: Configuration data structures for the host driver. */ #ifndef __OCTEON_CONFIG_H__ #define __OCTEON_CONFIG_H__ /*--------------------------CONFIG VALUES------------------------*/ /* The following macros affect the way the driver data structures * are generated for Octeon devices. * They can be modified. */ /* Maximum octeon devices defined as MAX_OCTEON_NICIF to support * multiple(<= MAX_OCTEON_NICIF) Miniports */ #define MAX_OCTEON_NICIF … #define MAX_OCTEON_DEVICES … #define MAX_OCTEON_LINKS … #define MAX_OCTEON_MULTICAST_ADDR … #define MAX_OCTEON_FILL_COUNT … /* CN6xxx IQ configuration macros */ #define CN6XXX_MAX_INPUT_QUEUES … #define CN6XXX_MAX_IQ_DESCRIPTORS … #define CN6XXX_DB_MIN … #define CN6XXX_DB_MAX … #define CN6XXX_DB_TIMEOUT … /* CN6xxx OQ configuration macros */ #define CN6XXX_MAX_OUTPUT_QUEUES … #define CN6XXX_MAX_OQ_DESCRIPTORS … #define CN6XXX_OQ_BUF_SIZE … #define CN6XXX_OQ_PKTSPER_INTR … #define CN6XXX_OQ_REFIL_THRESHOLD … #define CN6XXX_OQ_INTR_PKT … #define CN6XXX_OQ_INTR_TIME … #define DEFAULT_NUM_NIC_PORTS_66XX … #define DEFAULT_NUM_NIC_PORTS_68XX … #define DEFAULT_NUM_NIC_PORTS_68XX_210NV … /* CN23xx IQ configuration macros */ #define CN23XX_MAX_VFS_PER_PF_PASS_1_0 … #define CN23XX_MAX_VFS_PER_PF_PASS_1_1 … #define CN23XX_MAX_VFS_PER_PF … #define CN23XX_MAX_RINGS_PER_VF … #define CN23XX_MAX_RINGS_PER_PF_PASS_1_0 … #define CN23XX_MAX_RINGS_PER_PF_PASS_1_1 … #define CN23XX_MAX_RINGS_PER_PF … #define CN23XX_MAX_RINGS_PER_VF … #define CN23XX_MAX_INPUT_QUEUES … #define CN23XX_MAX_IQ_DESCRIPTORS … #define CN23XX_DEFAULT_IQ_DESCRIPTORS … #define CN23XX_MIN_IQ_DESCRIPTORS … #define CN23XX_DB_MIN … #define CN23XX_DB_MAX … #define CN23XX_DB_TIMEOUT … #define CN23XX_MAX_OUTPUT_QUEUES … #define CN23XX_MAX_OQ_DESCRIPTORS … #define CN23XX_DEFAULT_OQ_DESCRIPTORS … #define CN23XX_MIN_OQ_DESCRIPTORS … #define CN23XX_OQ_BUF_SIZE … #define CN23XX_OQ_PKTSPER_INTR … /*#define CAVIUM_ONLY_CN23XX_RX_PERF*/ #define CN23XX_OQ_REFIL_THRESHOLD … #define CN23XX_OQ_INTR_PKT … #define CN23XX_OQ_INTR_TIME … #define DEFAULT_NUM_NIC_PORTS_23XX … #define CN23XX_CFG_IO_QUEUES … /* PEMs count */ #define CN23XX_MAX_MACS … #define CN23XX_DEF_IQ_INTR_THRESHOLD … #define CN23XX_DEF_IQ_INTR_BYTE_THRESHOLD … /* common OCTEON configuration macros */ #define CN6XXX_CFG_IO_QUEUES … #define OCTEON_32BYTE_INSTR … #define OCTEON_64BYTE_INSTR … #define OCTEON_MAX_BASE_IOQ … #define OCTEON_DMA_INTR_PKT … #define OCTEON_DMA_INTR_TIME … #define MAX_TXQS_PER_INTF … #define MAX_RXQS_PER_INTF … #define DEF_TXQS_PER_INTF … #define DEF_RXQS_PER_INTF … #define INVALID_IOQ_NO … #define DEFAULT_POW_GRP … /* Macros to get octeon config params */ #define CFG_GET_IQ_CFG(cfg) … #define CFG_GET_IQ_MAX_Q(cfg) … #define CFG_GET_IQ_PENDING_LIST_SIZE(cfg) … #define CFG_GET_IQ_INSTR_TYPE(cfg) … #define CFG_GET_IQ_DB_MIN(cfg) … #define CFG_GET_IQ_DB_TIMEOUT(cfg) … #define CFG_GET_IQ_INTR_PKT(cfg) … #define CFG_SET_IQ_INTR_PKT(cfg, val) … #define CFG_GET_OQ_MAX_Q(cfg) … #define CFG_GET_OQ_PKTS_PER_INTR(cfg) … #define CFG_GET_OQ_REFILL_THRESHOLD(cfg) … #define CFG_GET_OQ_INTR_PKT(cfg) … #define CFG_GET_OQ_INTR_TIME(cfg) … #define CFG_SET_OQ_INTR_PKT(cfg, val) … #define CFG_SET_OQ_INTR_TIME(cfg, val) … #define CFG_GET_DMA_INTR_PKT(cfg) … #define CFG_GET_DMA_INTR_TIME(cfg) … #define CFG_GET_NUM_NIC_PORTS(cfg) … #define CFG_GET_NUM_DEF_TX_DESCS(cfg) … #define CFG_GET_NUM_DEF_RX_DESCS(cfg) … #define CFG_GET_DEF_RX_BUF_SIZE(cfg) … #define CFG_GET_MAX_TXQS_NIC_IF(cfg, idx) … #define CFG_GET_NUM_TXQS_NIC_IF(cfg, idx) … #define CFG_GET_MAX_RXQS_NIC_IF(cfg, idx) … #define CFG_GET_NUM_RXQS_NIC_IF(cfg, idx) … #define CFG_GET_NUM_RX_DESCS_NIC_IF(cfg, idx) … #define CFG_GET_NUM_TX_DESCS_NIC_IF(cfg, idx) … #define CFG_GET_NUM_RX_BUF_SIZE_NIC_IF(cfg, idx) … #define CFG_GET_BASE_QUE_NIC_IF(cfg, idx) … #define CFG_GET_GMXID_NIC_IF(cfg, idx) … #define CFG_GET_CTRL_Q_GRP(cfg) … #define CFG_GET_HOST_LINK_QUERY_INTERVAL(cfg) … #define CFG_GET_OCT_LINK_QUERY_INTERVAL(cfg) … #define CFG_GET_IS_SLI_BP_ON(cfg) … #define CFG_SET_NUM_RX_DESCS_NIC_IF(cfg, idx, value) … #define CFG_SET_NUM_TX_DESCS_NIC_IF(cfg, idx, value) … /* Max IOQs per OCTEON Link */ #define MAX_IOQS_PER_NICIF … enum lio_card_type { … }; #define LIO_210SV_NAME … #define LIO_210NV_NAME … #define LIO_410NV_NAME … #define LIO_23XX_NAME … /** Structure to define the configuration attributes for each Input queue. * Applicable to all Octeon processors **/ struct octeon_iq_config { … }; /** Structure to define the configuration attributes for each Output queue. * Applicable to all Octeon processors **/ struct octeon_oq_config { … }; /** This structure conatins the NIC link configuration attributes, * common for all the OCTEON Modles. */ struct octeon_nic_if_config { … }; /** Structure to define the configuration attributes for meta data. * Applicable to all Octeon processors. */ struct octeon_misc_config { … }; /** Structure to define the configuration for all OCTEON processors. */ struct octeon_config { … }; /* The following config values are fixed and should not be modified. */ #define BAR1_INDEX_DYNAMIC_MAP … #define BAR1_INDEX_STATIC_MAP … #define OCTEON_BAR1_ENTRY_SIZE … #define MAX_BAR1_IOREMAP_SIZE … /* Response lists - 1 ordered, 1 unordered-blocking, 1 unordered-nonblocking * 1 process done list, 1 zombie lists(timeouted sc list) * NoResponse Lists are now maintained with each IQ. (Dec' 2007). */ #define MAX_RESPONSE_LISTS … /* Opcode hash bits. The opcode is hashed on the lower 6-bits to lookup the * dispatch table. */ #define OPCODE_MASK_BITS … /* Mask for the 6-bit lookup hash */ #define OCTEON_OPCODE_MASK … /* Size of the dispatch table. The 6-bit hash can index into 2^6 entries */ #define DISPATCH_LIST_SIZE … /* Maximum number of Octeon Instruction (command) queues */ #define MAX_OCTEON_INSTR_QUEUES(oct) … /* Maximum number of Octeon Instruction (command) queues */ #define MAX_OCTEON_OUTPUT_QUEUES(oct) … #define MAX_POSSIBLE_OCTEON_INSTR_QUEUES … #define MAX_POSSIBLE_OCTEON_OUTPUT_QUEUES … #define MAX_POSSIBLE_VFS … #endif /* __OCTEON_CONFIG_H__ */
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