#include <linux/pci.h>
#include <linux/netdevice.h>
#include <linux/vmalloc.h>
#include "liquidio_common.h"
#include "octeon_droq.h"
#include "octeon_iq.h"
#include "response_manager.h"
#include "octeon_device.h"
#include "octeon_main.h"
#include "octeon_network.h"
#include "cn66xx_regs.h"
#include "cn66xx_device.h"
#include "cn23xx_pf_device.h"
#include "cn23xx_vf_device.h"
static struct octeon_config default_cn66xx_conf = …;
static struct octeon_config default_cn68xx_conf = …;
static struct octeon_config default_cn68xx_210nv_conf = …;
static struct octeon_config default_cn23xx_conf = …;
static struct octeon_config_ptr { … } oct_conf_info[MAX_OCTEON_DEVICES] = …;
static char oct_dev_state_str[OCT_DEV_STATES + 1][32] = …;
static char oct_dev_app_str[CVM_DRV_APP_COUNT + 1][32] = …;
static struct octeon_device *octeon_device[MAX_OCTEON_DEVICES];
static atomic_t adapter_refcounts[MAX_OCTEON_DEVICES];
static atomic_t adapter_fw_states[MAX_OCTEON_DEVICES];
static u32 octeon_device_count;
static DEFINE_SPINLOCK(octeon_devices_lock);
static struct octeon_core_setup core_setup[MAX_OCTEON_DEVICES];
static void oct_set_config_info(int oct_id, int conf_type)
{ … }
void octeon_init_device_list(int conf_type)
{ … }
EXPORT_SYMBOL_GPL(…);
static void *__retrieve_octeon_config_info(struct octeon_device *oct,
u16 card_type)
{ … }
static int __verify_octeon_config_info(struct octeon_device *oct, void *conf)
{ … }
void *oct_get_config_info(struct octeon_device *oct, u16 card_type)
{ … }
char *lio_get_state_string(atomic_t *state_ptr)
{ … }
EXPORT_SYMBOL_GPL(…);
static char *get_oct_app_string(u32 app_mode)
{ … }
void octeon_free_device_mem(struct octeon_device *oct)
{ … }
EXPORT_SYMBOL_GPL(…);
static struct octeon_device *octeon_allocate_device_mem(u32 pci_id,
u32 priv_size)
{ … }
struct octeon_device *octeon_allocate_device(u32 pci_id,
u32 priv_size)
{ … }
EXPORT_SYMBOL_GPL(…);
int octeon_register_device(struct octeon_device *oct,
int bus, int dev, int func, int is_pf)
{ … }
EXPORT_SYMBOL_GPL(…);
int octeon_deregister_device(struct octeon_device *oct)
{ … }
EXPORT_SYMBOL_GPL(…);
int
octeon_allocate_ioq_vector(struct octeon_device *oct, u32 num_ioqs)
{ … }
EXPORT_SYMBOL_GPL(…);
void
octeon_free_ioq_vector(struct octeon_device *oct)
{ … }
EXPORT_SYMBOL_GPL(…);
int octeon_setup_instr_queues(struct octeon_device *oct)
{ … }
EXPORT_SYMBOL_GPL(…);
int octeon_setup_output_queues(struct octeon_device *oct)
{ … }
EXPORT_SYMBOL_GPL(…);
int octeon_set_io_queues_off(struct octeon_device *oct)
{ … }
EXPORT_SYMBOL_GPL(…);
void octeon_set_droq_pkt_op(struct octeon_device *oct,
u32 q_no,
u32 enable)
{ … }
int octeon_init_dispatch_list(struct octeon_device *oct)
{ … }
EXPORT_SYMBOL_GPL(…);
void octeon_delete_dispatch_list(struct octeon_device *oct)
{ … }
EXPORT_SYMBOL_GPL(…);
octeon_dispatch_fn_t
octeon_get_dispatch(struct octeon_device *octeon_dev, u16 opcode,
u16 subcode)
{ … }
int
octeon_register_dispatch_fn(struct octeon_device *oct,
u16 opcode,
u16 subcode,
octeon_dispatch_fn_t fn, void *fn_arg)
{ … }
EXPORT_SYMBOL_GPL(…);
int octeon_core_drv_init(struct octeon_recv_info *recv_info, void *buf)
{ … }
EXPORT_SYMBOL_GPL(…);
int octeon_get_tx_qsize(struct octeon_device *oct, u32 q_no)
{ … }
EXPORT_SYMBOL_GPL(…);
int octeon_get_rx_qsize(struct octeon_device *oct, u32 q_no)
{ … }
EXPORT_SYMBOL_GPL(…);
struct octeon_config *octeon_get_conf(struct octeon_device *oct)
{ … }
EXPORT_SYMBOL_GPL(…);
#define CNXX_SLI_SCRATCH1 …
struct octeon_device *lio_get_device(u32 octeon_id)
{ … }
EXPORT_SYMBOL_GPL(…);
u64 lio_pci_readq(struct octeon_device *oct, u64 addr)
{ … }
EXPORT_SYMBOL_GPL(…);
void lio_pci_writeq(struct octeon_device *oct,
u64 val,
u64 addr)
{ … }
EXPORT_SYMBOL_GPL(…);
int octeon_mem_access_ok(struct octeon_device *oct)
{ … }
EXPORT_SYMBOL_GPL(…);
int octeon_wait_for_ddr_init(struct octeon_device *oct, u32 *timeout)
{ … }
EXPORT_SYMBOL_GPL(…);
int lio_get_device_id(void *dev)
{ … }
void lio_enable_irq(struct octeon_droq *droq, struct octeon_instr_queue *iq)
{ … }
EXPORT_SYMBOL_GPL(…);