linux/drivers/net/ethernet/cavium/liquidio/octeon_mem_ops.c

/**********************************************************************
 * Author: Cavium, Inc.
 *
 * Contact: [email protected]
 *          Please include "LiquidIO" in the subject.
 *
 * Copyright (c) 2003-2016 Cavium, Inc.
 *
 * This file is free software; you can redistribute it and/or modify
 * it under the terms of the GNU General Public License, Version 2, as
 * published by the Free Software Foundation.
 *
 * This file is distributed in the hope that it will be useful, but
 * AS-IS and WITHOUT ANY WARRANTY; without even the implied warranty
 * of MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE, TITLE, or
 * NONINFRINGEMENT.  See the GNU General Public License for more
 * details.
 **********************************************************************/
#include <linux/netdevice.h>
#include "liquidio_common.h"
#include "octeon_droq.h"
#include "octeon_iq.h"
#include "response_manager.h"
#include "octeon_device.h"
#include "octeon_mem_ops.h"

#define MEMOPS_IDX …

#ifdef __BIG_ENDIAN_BITFIELD
static inline void
octeon_toggle_bar1_swapmode(struct octeon_device *oct, u32 idx)
{
	u32 mask;

	mask = oct->fn_list.bar1_idx_read(oct, idx);
	mask = (mask & 0x2) ? (mask & ~2) : (mask | 2);
	oct->fn_list.bar1_idx_write(oct, idx, mask);
}
#else
#define octeon_toggle_bar1_swapmode(oct, idx) …
#endif

static void
octeon_pci_fastwrite(struct octeon_device *oct, u8 __iomem *mapped_addr,
		     u8 *hostbuf, u32 len)
{ … }

static void
octeon_pci_fastread(struct octeon_device *oct, u8 __iomem *mapped_addr,
		    u8 *hostbuf, u32 len)
{ … }

/* Core mem read/write with temporary bar1 settings. */
/* op = 1 to read, op = 0 to write. */
static void
__octeon_pci_rw_core_mem(struct octeon_device *oct, u64 addr,
			 u8 *hostbuf, u32 len, u32 op)
{ … }

void
octeon_pci_read_core_mem(struct octeon_device *oct,
			 u64 coreaddr,
			 u8 *buf,
			 u32 len)
{ … }
EXPORT_SYMBOL_GPL(…);

void
octeon_pci_write_core_mem(struct octeon_device *oct,
			  u64 coreaddr,
			  const u8 *buf,
			  u32 len)
{ … }
EXPORT_SYMBOL_GPL(…);

u64 octeon_read_device_mem64(struct octeon_device *oct, u64 coreaddr)
{ … }
EXPORT_SYMBOL_GPL(…);

u32 octeon_read_device_mem32(struct octeon_device *oct, u64 coreaddr)
{ … }
EXPORT_SYMBOL_GPL(…);

void octeon_write_device_mem32(struct octeon_device *oct, u64 coreaddr,
			       u32 val)
{ … }
EXPORT_SYMBOL_GPL(…);