// SPDX-License-Identifier: GPL-2.0 /* * Renesas RZ/G2L MTU3a PWM Timer driver * * Copyright (C) 2023 Renesas Electronics Corporation * * Hardware manual for this IP can be found here * https://www.renesas.com/eu/en/document/mah/rzg2l-group-rzg2lc-group-users-manual-hardware-0?language=en * * Limitations: * - When PWM is disabled, the output is driven to Hi-Z. * - While the hardware supports both polarities, the driver (for now) * only handles normal polarity. * - HW uses one counter and two match components to configure duty_cycle * and period. * - Multi-Function Timer Pulse Unit (a.k.a MTU) has 7 HW channels for PWM * operations. (The channels are MTU{0..4, 6, 7}.) * - MTU{1, 2} channels have a single IO, whereas all other HW channels have * 2 IOs. * - Each IO is modelled as an independent PWM channel. * - rz_mtu3_channel_io_map table is used to map the PWM channel to the * corresponding HW channel as there are difference in number of IOs * between HW channels. */ #include <linux/bitfield.h> #include <linux/clk.h> #include <linux/limits.h> #include <linux/mfd/rz-mtu3.h> #include <linux/module.h> #include <linux/platform_device.h> #include <linux/pm_runtime.h> #include <linux/pwm.h> #include <linux/time.h> #define RZ_MTU3_MAX_PWM_CHANNELS … #define RZ_MTU3_MAX_HW_CHANNELS … /** * struct rz_mtu3_channel_io_map - MTU3 pwm channel map * * @base_pwm_number: First PWM of a channel * @num_channel_ios: number of IOs on the HW channel. */ struct rz_mtu3_channel_io_map { … }; /** * struct rz_mtu3_pwm_channel - MTU3 pwm channel data * * @mtu: MTU3 channel data * @map: MTU3 pwm channel map */ struct rz_mtu3_pwm_channel { … }; /** * struct rz_mtu3_pwm_chip - MTU3 pwm private data * * @clk: MTU3 module clock * @lock: Lock to prevent concurrent access for usage count * @rate: MTU3 clock rate * @user_count: MTU3 usage count * @enable_count: MTU3 enable count * @prescale: MTU3 prescale * @channel_data: MTU3 pwm channel data */ struct rz_mtu3_pwm_chip { … }; /* * The MTU channels are {0..4, 6, 7} and the number of IO on MTU1 * and MTU2 channel is 1 compared to 2 on others. */ static const struct rz_mtu3_channel_io_map channel_map[] = …; static inline struct rz_mtu3_pwm_chip *to_rz_mtu3_pwm_chip(struct pwm_chip *chip) { … } static void rz_mtu3_pwm_read_tgr_registers(struct rz_mtu3_pwm_channel *priv, u16 reg_pv_offset, u16 *pv_val, u16 reg_dc_offset, u16 *dc_val) { … } static void rz_mtu3_pwm_write_tgr_registers(struct rz_mtu3_pwm_channel *priv, u16 reg_pv_offset, u16 pv_val, u16 reg_dc_offset, u16 dc_val) { … } static u8 rz_mtu3_pwm_calculate_prescale(struct rz_mtu3_pwm_chip *rz_mtu3, u64 period_cycles) { … } static struct rz_mtu3_pwm_channel * rz_mtu3_get_channel(struct rz_mtu3_pwm_chip *rz_mtu3_pwm, u32 hwpwm) { … } static bool rz_mtu3_pwm_is_ch_enabled(struct rz_mtu3_pwm_chip *rz_mtu3_pwm, u32 hwpwm) { … } static int rz_mtu3_pwm_request(struct pwm_chip *chip, struct pwm_device *pwm) { … } static void rz_mtu3_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm) { … } static int rz_mtu3_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm) { … } static void rz_mtu3_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm) { … } static int rz_mtu3_pwm_get_state(struct pwm_chip *chip, struct pwm_device *pwm, struct pwm_state *state) { … } static u16 rz_mtu3_pwm_calculate_pv_or_dc(u64 period_or_duty_cycle, u8 prescale) { … } static int rz_mtu3_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm, const struct pwm_state *state) { … } static int rz_mtu3_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm, const struct pwm_state *state) { … } static const struct pwm_ops rz_mtu3_pwm_ops = …; static int rz_mtu3_pwm_pm_runtime_suspend(struct device *dev) { … } static int rz_mtu3_pwm_pm_runtime_resume(struct device *dev) { … } static DEFINE_RUNTIME_DEV_PM_OPS(rz_mtu3_pwm_pm_ops, rz_mtu3_pwm_pm_runtime_suspend, rz_mtu3_pwm_pm_runtime_resume, NULL); static void rz_mtu3_pwm_pm_disable(void *data) { … } static int rz_mtu3_pwm_probe(struct platform_device *pdev) { … } static struct platform_driver rz_mtu3_pwm_driver = …; module_platform_driver(…) …; MODULE_AUTHOR(…) …; MODULE_ALIAS(…) …; MODULE_DESCRIPTION(…) …; MODULE_LICENSE(…) …;
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