/* SPDX-License-Identifier: GPL-2.0 */ /* * STM32 Low-Power Timer parent driver. * Copyright (C) STMicroelectronics 2017 * Author: Fabrice Gasnier <[email protected]> * Inspired by Benjamin Gaignard's stm32-timers driver */ #ifndef _LINUX_STM32_LPTIMER_H_ #define _LINUX_STM32_LPTIMER_H_ #include <linux/clk.h> #include <linux/regmap.h> #define STM32_LPTIM_ISR … #define STM32_LPTIM_ICR … #define STM32_LPTIM_IER … #define STM32_LPTIM_CFGR … #define STM32_LPTIM_CR … #define STM32_LPTIM_CMP … #define STM32_LPTIM_ARR … #define STM32_LPTIM_CNT … /* STM32_LPTIM_ISR - bit fields */ #define STM32_LPTIM_CMPOK_ARROK … #define STM32_LPTIM_ARROK … #define STM32_LPTIM_CMPOK … /* STM32_LPTIM_ICR - bit fields */ #define STM32_LPTIM_ARRMCF … #define STM32_LPTIM_CMPOKCF_ARROKCF … /* STM32_LPTIM_IER - bit flieds */ #define STM32_LPTIM_ARRMIE … /* STM32_LPTIM_CR - bit fields */ #define STM32_LPTIM_CNTSTRT … #define STM32_LPTIM_SNGSTRT … #define STM32_LPTIM_ENABLE … /* STM32_LPTIM_CFGR - bit fields */ #define STM32_LPTIM_ENC … #define STM32_LPTIM_COUNTMODE … #define STM32_LPTIM_WAVPOL … #define STM32_LPTIM_PRESC … #define STM32_LPTIM_CKPOL … /* STM32_LPTIM_CKPOL */ #define STM32_LPTIM_CKPOL_RISING_EDGE … #define STM32_LPTIM_CKPOL_FALLING_EDGE … #define STM32_LPTIM_CKPOL_BOTH_EDGES … /* STM32_LPTIM_ARR */ #define STM32_LPTIM_MAX_ARR … /** * struct stm32_lptimer - STM32 Low-Power Timer data assigned by parent device * @clk: clock reference for this instance * @regmap: register map reference for this instance * @has_encoder: indicates this Low-Power Timer supports encoder mode */ struct stm32_lptimer { … }; #endif
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