#include <linux/module.h>
#include <linux/platform_device.h>
#include <linux/pwm.h>
#include <linux/io.h>
#include <linux/err.h>
#include <linux/clk.h>
#include <linux/pm_runtime.h>
#include <linux/of.h>
#define TBCTL …
#define TBPRD …
#define TBCTL_PRDLD_MASK …
#define TBCTL_PRDLD_SHDW …
#define TBCTL_PRDLD_IMDT …
#define TBCTL_CLKDIV_MASK …
#define TBCTL_CTRMODE_MASK …
#define TBCTL_CTRMODE_UP …
#define TBCTL_CTRMODE_DOWN …
#define TBCTL_CTRMODE_UPDOWN …
#define TBCTL_CTRMODE_FREEZE …
#define TBCTL_HSPCLKDIV_SHIFT …
#define TBCTL_CLKDIV_SHIFT …
#define CLKDIV_MAX …
#define HSPCLKDIV_MAX …
#define PERIOD_MAX …
#define CMPA …
#define CMPB …
#define AQCTLA …
#define AQCTLB …
#define AQSFRC …
#define AQCSFRC …
#define AQCTL_CBU_MASK …
#define AQCTL_CBU_FRCLOW …
#define AQCTL_CBU_FRCHIGH …
#define AQCTL_CBU_FRCTOGGLE …
#define AQCTL_CAU_MASK …
#define AQCTL_CAU_FRCLOW …
#define AQCTL_CAU_FRCHIGH …
#define AQCTL_CAU_FRCTOGGLE …
#define AQCTL_PRD_MASK …
#define AQCTL_PRD_FRCLOW …
#define AQCTL_PRD_FRCHIGH …
#define AQCTL_PRD_FRCTOGGLE …
#define AQCTL_ZRO_MASK …
#define AQCTL_ZRO_FRCLOW …
#define AQCTL_ZRO_FRCHIGH …
#define AQCTL_ZRO_FRCTOGGLE …
#define AQCTL_CHANA_POLNORMAL …
#define AQCTL_CHANA_POLINVERSED …
#define AQCTL_CHANB_POLNORMAL …
#define AQCTL_CHANB_POLINVERSED …
#define AQSFRC_RLDCSF_MASK …
#define AQSFRC_RLDCSF_ZRO …
#define AQSFRC_RLDCSF_PRD …
#define AQSFRC_RLDCSF_ZROPRD …
#define AQSFRC_RLDCSF_IMDT …
#define AQCSFRC_CSFB_MASK …
#define AQCSFRC_CSFB_FRCDIS …
#define AQCSFRC_CSFB_FRCLOW …
#define AQCSFRC_CSFB_FRCHIGH …
#define AQCSFRC_CSFB_DISSWFRC …
#define AQCSFRC_CSFA_MASK …
#define AQCSFRC_CSFA_FRCDIS …
#define AQCSFRC_CSFA_FRCLOW …
#define AQCSFRC_CSFA_FRCHIGH …
#define AQCSFRC_CSFA_DISSWFRC …
#define NUM_PWM_CHANNEL …
struct ehrpwm_context { … };
struct ehrpwm_pwm_chip { … };
static inline struct ehrpwm_pwm_chip *to_ehrpwm_pwm_chip(struct pwm_chip *chip)
{ … }
static inline u16 ehrpwm_read(void __iomem *base, unsigned int offset)
{ … }
static inline void ehrpwm_write(void __iomem *base, unsigned int offset,
u16 value)
{ … }
static void ehrpwm_modify(void __iomem *base, unsigned int offset, u16 mask,
u16 value)
{ … }
static int set_prescale_div(unsigned long rqst_prescaler, u16 *prescale_div,
u16 *tb_clk_div)
{ … }
static void configure_polarity(struct ehrpwm_pwm_chip *pc, int chan)
{ … }
static int ehrpwm_pwm_config(struct pwm_chip *chip, struct pwm_device *pwm,
u64 duty_ns, u64 period_ns)
{ … }
static int ehrpwm_pwm_set_polarity(struct pwm_chip *chip,
struct pwm_device *pwm,
enum pwm_polarity polarity)
{ … }
static int ehrpwm_pwm_enable(struct pwm_chip *chip, struct pwm_device *pwm)
{ … }
static void ehrpwm_pwm_disable(struct pwm_chip *chip, struct pwm_device *pwm)
{ … }
static void ehrpwm_pwm_free(struct pwm_chip *chip, struct pwm_device *pwm)
{ … }
static int ehrpwm_pwm_apply(struct pwm_chip *chip, struct pwm_device *pwm,
const struct pwm_state *state)
{ … }
static const struct pwm_ops ehrpwm_pwm_ops = …;
static const struct of_device_id ehrpwm_of_match[] = …;
MODULE_DEVICE_TABLE(of, ehrpwm_of_match);
static int ehrpwm_pwm_probe(struct platform_device *pdev)
{ … }
static void ehrpwm_pwm_remove(struct platform_device *pdev)
{ … }
static void ehrpwm_pwm_save_context(struct pwm_chip *chip)
{ … }
static void ehrpwm_pwm_restore_context(struct pwm_chip *chip)
{ … }
static int ehrpwm_pwm_suspend(struct device *dev)
{ … }
static int ehrpwm_pwm_resume(struct device *dev)
{ … }
static DEFINE_SIMPLE_DEV_PM_OPS(ehrpwm_pwm_pm_ops, ehrpwm_pwm_suspend,
ehrpwm_pwm_resume);
static struct platform_driver ehrpwm_pwm_driver = …;
module_platform_driver(…) …;
MODULE_DESCRIPTION(…) …;
MODULE_AUTHOR(…) …;
MODULE_LICENSE(…) …;