/* SPDX-License-Identifier: GPL-2.0+ */ // Copyright (c) 2016-2017 Hisilicon Limited. #ifndef __HCLGE_CMD_H #define __HCLGE_CMD_H #include <linux/types.h> #include <linux/io.h> #include <linux/etherdevice.h> #include "hnae3.h" #include "hclge_comm_cmd.h" struct hclge_dev; #define HCLGE_CMDQ_RX_INVLD_B … #define HCLGE_CMDQ_RX_OUTVLD_B … struct hclge_misc_vector { … }; #define hclge_cmd_setup_basic_desc(desc, opcode, is_read) … #define HCLGE_TQP_REG_OFFSET … #define HCLGE_TQP_REG_SIZE … #define HCLGE_TQP_MAX_SIZE_DEV_V2 … #define HCLGE_TQP_EXT_REG_OFFSET … #define HCLGE_RCB_INIT_QUERY_TIMEOUT … #define HCLGE_RCB_INIT_FLAG_EN_B … #define HCLGE_RCB_INIT_FLAG_FINI_B … struct hclge_config_rcb_init_cmd { … }; struct hclge_tqp_map_cmd { … }; #define HCLGE_VECTOR_ELEMENTS_PER_CMD … enum hclge_int_type { … }; struct hclge_ctrl_vector_chain_cmd { … }; #define HCLGE_MAX_TC_NUM … #define HCLGE_TC0_PRI_BUF_EN_B … #define HCLGE_BUF_UNIT_S … struct hclge_tx_buff_alloc_cmd { … }; struct hclge_rx_priv_buff_cmd { … }; #define HCLGE_RX_PRIV_EN_B … #define HCLGE_TC_NUM_ONE_DESC … struct hclge_priv_wl { … }; struct hclge_rx_priv_wl_buf { … }; struct hclge_rx_com_thrd { … }; struct hclge_rx_com_wl { … }; struct hclge_waterline { … }; struct hclge_tc_thrd { … }; struct hclge_priv_buf { … }; struct hclge_shared_buf { … }; struct hclge_pkt_buf_alloc { … }; #define HCLGE_RX_COM_WL_EN_B … struct hclge_rx_com_wl_buf_cmd { … }; #define HCLGE_RX_PKT_EN_B … struct hclge_rx_pkt_buf_cmd { … }; #define HCLGE_PF_STATE_DONE_B … #define HCLGE_PF_STATE_MAIN_B … #define HCLGE_PF_STATE_BOND_B … #define HCLGE_PF_STATE_MAC_N_B … #define HCLGE_PF_MAC_NUM_MASK … #define HCLGE_PF_STATE_MAIN … #define HCLGE_PF_STATE_DONE … #define HCLGE_VF_RST_STATUS_CMD … struct hclge_func_status_cmd { … }; struct hclge_pf_res_cmd { … }; #define HCLGE_CFG_OFFSET_S … #define HCLGE_CFG_OFFSET_M … #define HCLGE_CFG_RD_LEN_S … #define HCLGE_CFG_RD_LEN_M … #define HCLGE_CFG_RD_LEN_BYTES … #define HCLGE_CFG_RD_LEN_UNIT … #define HCLGE_CFG_TC_NUM_S … #define HCLGE_CFG_TC_NUM_M … #define HCLGE_CFG_TQP_DESC_N_S … #define HCLGE_CFG_TQP_DESC_N_M … #define HCLGE_CFG_PHY_ADDR_S … #define HCLGE_CFG_PHY_ADDR_M … #define HCLGE_CFG_MEDIA_TP_S … #define HCLGE_CFG_MEDIA_TP_M … #define HCLGE_CFG_RX_BUF_LEN_S … #define HCLGE_CFG_RX_BUF_LEN_M … #define HCLGE_CFG_MAC_ADDR_H_S … #define HCLGE_CFG_MAC_ADDR_H_M … #define HCLGE_CFG_DEFAULT_SPEED_S … #define HCLGE_CFG_DEFAULT_SPEED_M … #define HCLGE_CFG_RSS_SIZE_S … #define HCLGE_CFG_RSS_SIZE_M … #define HCLGE_CFG_SPEED_ABILITY_S … #define HCLGE_CFG_SPEED_ABILITY_M … #define HCLGE_CFG_SPEED_ABILITY_EXT_S … #define HCLGE_CFG_SPEED_ABILITY_EXT_M … #define HCLGE_CFG_VLAN_FLTR_CAP_S … #define HCLGE_CFG_VLAN_FLTR_CAP_M … #define HCLGE_CFG_UMV_TBL_SPACE_S … #define HCLGE_CFG_UMV_TBL_SPACE_M … #define HCLGE_CFG_PF_RSS_SIZE_S … #define HCLGE_CFG_PF_RSS_SIZE_M … #define HCLGE_CFG_TX_SPARE_BUF_SIZE_S … #define HCLGE_CFG_TX_SPARE_BUF_SIZE_M … #define HCLGE_CFG_CMD_CNT … struct hclge_cfg_param_cmd { … }; #define HCLGE_MAC_MODE … #define HCLGE_DESC_NUM … #define HCLGE_ALLOC_VALID_B … struct hclge_vf_num_cmd { … }; #define HCLGE_RSS_DEFAULT_OUTPORT_B … #define HCLGE_RSS_CFG_TBL_SIZE_H … #define HCLGE_RSS_CFG_TBL_BW_L … #define HCLGE_RSS_TC_OFFSET_S … #define HCLGE_RSS_TC_OFFSET_M … #define HCLGE_RSS_TC_SIZE_MSB_B … #define HCLGE_RSS_TC_SIZE_S … #define HCLGE_RSS_TC_SIZE_M … #define HCLGE_RSS_TC_SIZE_MSB_OFFSET … #define HCLGE_RSS_TC_VALID_B … #define HCLGE_LINK_STATUS_UP_B … #define HCLGE_LINK_STATUS_UP_M … struct hclge_link_status_cmd { … }; /* for DEVICE_VERSION_V1/2, reference to promisc cmd byte8 */ #define HCLGE_PROMISC_EN_UC … #define HCLGE_PROMISC_EN_MC … #define HCLGE_PROMISC_EN_BC … #define HCLGE_PROMISC_TX_EN … #define HCLGE_PROMISC_RX_EN … /* for DEVICE_VERSION_V3, reference to promisc cmd byte10 */ #define HCLGE_PROMISC_UC_RX_EN … #define HCLGE_PROMISC_MC_RX_EN … #define HCLGE_PROMISC_BC_RX_EN … #define HCLGE_PROMISC_UC_TX_EN … #define HCLGE_PROMISC_MC_TX_EN … #define HCLGE_PROMISC_BC_TX_EN … struct hclge_promisc_cfg_cmd { … }; enum hclge_promisc_type { … }; #define HCLGE_MAC_TX_EN_B … #define HCLGE_MAC_RX_EN_B … #define HCLGE_MAC_PAD_TX_B … #define HCLGE_MAC_PAD_RX_B … #define HCLGE_MAC_1588_TX_B … #define HCLGE_MAC_1588_RX_B … #define HCLGE_MAC_APP_LP_B … #define HCLGE_MAC_LINE_LP_B … #define HCLGE_MAC_FCS_TX_B … #define HCLGE_MAC_RX_OVERSIZE_TRUNCATE_B … #define HCLGE_MAC_RX_FCS_STRIP_B … #define HCLGE_MAC_RX_FCS_B … #define HCLGE_MAC_TX_UNDER_MIN_ERR_B … #define HCLGE_MAC_TX_OVERSIZE_TRUNCATE_B … struct hclge_config_mac_mode_cmd { … }; struct hclge_pf_rst_sync_cmd { … }; #define HCLGE_CFG_SPEED_S … #define HCLGE_CFG_SPEED_M … #define HCLGE_CFG_DUPLEX_B … #define HCLGE_CFG_DUPLEX_M … struct hclge_config_mac_speed_dup_cmd { … }; #define HCLGE_TQP_ENABLE_B … #define HCLGE_MAC_CFG_AN_EN_B … #define HCLGE_MAC_CFG_AN_INT_EN_B … #define HCLGE_MAC_CFG_AN_INT_MSK_B … #define HCLGE_MAC_CFG_AN_INT_CLR_B … #define HCLGE_MAC_CFG_AN_RST_B … #define HCLGE_MAC_CFG_AN_EN … struct hclge_config_auto_neg_cmd { … }; struct hclge_sfp_info_cmd { … }; #define HCLGE_MAC_CFG_FEC_AUTO_EN_B … #define HCLGE_MAC_CFG_FEC_MODE_S … #define HCLGE_MAC_CFG_FEC_MODE_M … #define HCLGE_MAC_CFG_FEC_SET_DEF_B … #define HCLGE_MAC_CFG_FEC_CLR_DEF_B … #define HCLGE_MAC_FEC_OFF … #define HCLGE_MAC_FEC_BASER … #define HCLGE_MAC_FEC_RS … #define HCLGE_MAC_FEC_LLRS … struct hclge_config_fec_cmd { … }; #define HCLGE_FEC_STATS_CMD_NUM … struct hclge_query_fec_stats_cmd { … }; #define HCLGE_MAC_UPLINK_PORT … struct hclge_config_max_frm_size_cmd { … }; enum hclge_mac_vlan_tbl_opcode { … }; enum hclge_mac_vlan_add_resp_code { … }; #define HCLGE_MAC_VLAN_BIT0_EN_B … #define HCLGE_MAC_VLAN_BIT1_EN_B … #define HCLGE_MAC_EPORT_SW_EN_B … #define HCLGE_MAC_EPORT_TYPE_B … #define HCLGE_MAC_EPORT_VFID_S … #define HCLGE_MAC_EPORT_VFID_M … #define HCLGE_MAC_EPORT_PFID_S … #define HCLGE_MAC_EPORT_PFID_M … struct hclge_mac_vlan_tbl_entry_cmd { … }; #define HCLGE_UMV_SPC_ALC_B … struct hclge_umv_spc_alc_cmd { … }; #define HCLGE_MAC_MGR_MASK_VLAN_B … #define HCLGE_MAC_MGR_MASK_MAC_B … #define HCLGE_MAC_MGR_MASK_ETHERTYPE_B … struct hclge_mac_mgr_tbl_entry_cmd { … }; struct hclge_vlan_filter_ctrl_cmd { … }; #define HCLGE_VLAN_ID_OFFSET_STEP … #define HCLGE_VLAN_BYTE_SIZE … #define HCLGE_VLAN_OFFSET_BITMAP … struct hclge_vlan_filter_pf_cfg_cmd { … }; #define HCLGE_MAX_VF_BYTES … struct hclge_vlan_filter_vf_cfg_cmd { … }; #define HCLGE_INGRESS_BYPASS_B … struct hclge_port_vlan_filter_bypass_cmd { … }; #define HCLGE_SWITCH_ANTI_SPOOF_B … #define HCLGE_SWITCH_ALW_LPBK_B … #define HCLGE_SWITCH_ALW_LCL_LPBK_B … #define HCLGE_SWITCH_ALW_DST_OVRD_B … #define HCLGE_SWITCH_NO_MASK … #define HCLGE_SWITCH_ANTI_SPOOF_MASK … #define HCLGE_SWITCH_ALW_LPBK_MASK … #define HCLGE_SWITCH_ALW_LCL_LPBK_MASK … #define HCLGE_SWITCH_LW_DST_OVRD_MASK … struct hclge_mac_vlan_switch_cmd { … }; enum hclge_mac_vlan_cfg_sel { … }; #define HCLGE_ACCEPT_TAG1_B … #define HCLGE_ACCEPT_UNTAG1_B … #define HCLGE_PORT_INS_TAG1_EN_B … #define HCLGE_PORT_INS_TAG2_EN_B … #define HCLGE_CFG_NIC_ROCE_SEL_B … #define HCLGE_ACCEPT_TAG2_B … #define HCLGE_ACCEPT_UNTAG2_B … #define HCLGE_TAG_SHIFT_MODE_EN_B … #define HCLGE_VF_NUM_PER_BYTE … struct hclge_vport_vtag_tx_cfg_cmd { … }; #define HCLGE_REM_TAG1_EN_B … #define HCLGE_REM_TAG2_EN_B … #define HCLGE_SHOW_TAG1_EN_B … #define HCLGE_SHOW_TAG2_EN_B … #define HCLGE_DISCARD_TAG1_EN_B … #define HCLGE_DISCARD_TAG2_EN_B … struct hclge_vport_vtag_rx_cfg_cmd { … }; struct hclge_tx_vlan_type_cfg_cmd { … }; struct hclge_rx_vlan_type_cfg_cmd { … }; struct hclge_cfg_com_tqp_queue_cmd { … }; struct hclge_cfg_tx_queue_pointer_cmd { … }; #pragma pack(1) struct hclge_mac_ethertype_idx_rd_cmd { … }; #pragma pack() #define HCLGE_TSO_MSS_MIN_S … #define HCLGE_TSO_MSS_MIN_M … #define HCLGE_TSO_MSS_MAX_S … #define HCLGE_TSO_MSS_MAX_M … struct hclge_cfg_tso_status_cmd { … }; #define HCLGE_GRO_EN_B … struct hclge_cfg_gro_status_cmd { … }; #define HCLGE_TSO_MSS_MIN … #define HCLGE_TSO_MSS_MAX … #define HCLGE_TQP_RESET_B … struct hclge_reset_tqp_queue_cmd { … }; #define HCLGE_CFG_RESET_MAC_B … #define HCLGE_CFG_RESET_FUNC_B … #define HCLGE_CFG_RESET_RCB_B … struct hclge_reset_cmd { … }; #define HCLGE_PF_RESET_DONE_BIT … struct hclge_pf_rst_done_cmd { … }; #define HCLGE_CMD_SERDES_SERIAL_INNER_LOOP_B … #define HCLGE_CMD_SERDES_PARALLEL_INNER_LOOP_B … #define HCLGE_CMD_GE_PHY_INNER_LOOP_B … #define HCLGE_CMD_COMMON_LB_DONE_B … #define HCLGE_CMD_COMMON_LB_SUCCESS_B … struct hclge_common_lb_cmd { … }; #define HCLGE_DEFAULT_TX_BUF … #define HCLGE_TOTAL_PKT_BUF … #define HCLGE_DEFAULT_DV … #define HCLGE_DEFAULT_NON_DCB_DV … #define HCLGE_NON_DCB_ADDITIONAL_BUF … #define HCLGE_LED_LOCATE_STATE_S … #define HCLGE_LED_LOCATE_STATE_M … struct hclge_set_led_state_cmd { … }; struct hclge_get_fd_mode_cmd { … }; struct hclge_get_fd_allocation_cmd { … }; struct hclge_set_fd_key_config_cmd { … }; #define HCLGE_FD_EPORT_SW_EN_B … struct hclge_fd_tcam_config_1_cmd { … }; struct hclge_fd_tcam_config_2_cmd { … }; struct hclge_fd_tcam_config_3_cmd { … }; #define HCLGE_FD_AD_DROP_B … #define HCLGE_FD_AD_DIRECT_QID_B … #define HCLGE_FD_AD_QID_S … #define HCLGE_FD_AD_QID_M … #define HCLGE_FD_AD_USE_COUNTER_B … #define HCLGE_FD_AD_COUNTER_NUM_S … #define HCLGE_FD_AD_COUNTER_NUM_M … #define HCLGE_FD_AD_NXT_STEP_B … #define HCLGE_FD_AD_NXT_KEY_S … #define HCLGE_FD_AD_NXT_KEY_M … #define HCLGE_FD_AD_WR_RULE_ID_B … #define HCLGE_FD_AD_RULE_ID_S … #define HCLGE_FD_AD_RULE_ID_M … #define HCLGE_FD_AD_TC_OVRD_B … #define HCLGE_FD_AD_TC_SIZE_S … #define HCLGE_FD_AD_TC_SIZE_M … struct hclge_fd_ad_config_cmd { … }; struct hclge_fd_ad_cnt_read_cmd { … }; #define HCLGE_FD_USER_DEF_OFT_S … #define HCLGE_FD_USER_DEF_OFT_M … #define HCLGE_FD_USER_DEF_EN_B … struct hclge_fd_user_def_cfg_cmd { … }; struct hclge_get_imp_bd_cmd { … }; struct hclge_query_ppu_pf_other_int_dfx_cmd { … }; #define HCLGE_SFP_INFO_CMD_NUM … #define HCLGE_SFP_INFO_BD0_LEN … #define HCLGE_SFP_INFO_BDX_LEN … #define HCLGE_SFP_INFO_MAX_LEN … struct hclge_sfp_info_bd0_cmd { … }; #define HCLGE_QUERY_DEV_SPECS_BD_NUM … struct hclge_dev_specs_0_cmd { … }; #define HCLGE_DEF_MAX_INT_GL … struct hclge_dev_specs_1_cmd { … }; /* mac speed type defined in firmware command */ enum HCLGE_FIRMWARE_MAC_SPEED { … }; #define HCLGE_PHY_LINK_SETTING_BD_NUM … struct hclge_phy_link_ksetting_0_cmd { … }; struct hclge_phy_link_ksetting_1_cmd { … }; struct hclge_phy_reg_cmd { … }; struct hclge_wol_cfg_cmd { … }; struct hclge_query_wol_supported_cmd { … }; struct hclge_hw; int hclge_cmd_send(struct hclge_hw *hw, struct hclge_desc *desc, int num); #endif
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