/* SPDX-License-Identifier: GPL-2.0+ */ // Copyright (c) 2016-2017 Hisilicon Limited. #ifndef __HCLGE_MAIN_H #define __HCLGE_MAIN_H #include <linux/fs.h> #include <linux/types.h> #include <linux/phy.h> #include <linux/if_vlan.h> #include <linux/kfifo.h> #include <net/devlink.h> #include "hclge_cmd.h" #include "hclge_ptp.h" #include "hnae3.h" #include "hclge_comm_rss.h" #include "hclge_comm_tqp_stats.h" #define HCLGE_MOD_VERSION … #define HCLGE_DRIVER_NAME … #define HCLGE_MAX_PF_NUM … #define HCLGE_VF_VPORT_START_NUM … #define HCLGE_RD_FIRST_STATS_NUM … #define HCLGE_RD_OTHER_STATS_NUM … #define HCLGE_INVALID_VPORT … #define HCLGE_PF_CFG_BLOCK_SIZE … #define HCLGE_PF_CFG_DESC_NUM … #define HCLGE_VECTOR_REG_BASE … #define HCLGE_VECTOR_EXT_REG_BASE … #define HCLGE_MISC_VECTOR_REG_BASE … #define HCLGE_VECTOR_REG_OFFSET … #define HCLGE_VECTOR_REG_OFFSET_H … #define HCLGE_VECTOR_VF_OFFSET … #define HCLGE_NIC_CSQ_DEPTH_REG … /* bar registers for common func */ #define HCLGE_GRO_EN_REG … #define HCLGE_RXD_ADV_LAYOUT_EN_REG … /* bar registers for rcb */ #define HCLGE_RING_RX_ADDR_L_REG … #define HCLGE_RING_RX_ADDR_H_REG … #define HCLGE_RING_RX_BD_NUM_REG … #define HCLGE_RING_RX_BD_LENGTH_REG … #define HCLGE_RING_RX_MERGE_EN_REG … #define HCLGE_RING_RX_TAIL_REG … #define HCLGE_RING_RX_HEAD_REG … #define HCLGE_RING_RX_FBD_NUM_REG … #define HCLGE_RING_RX_OFFSET_REG … #define HCLGE_RING_RX_FBD_OFFSET_REG … #define HCLGE_RING_RX_STASH_REG … #define HCLGE_RING_RX_BD_ERR_REG … #define HCLGE_RING_TX_ADDR_L_REG … #define HCLGE_RING_TX_ADDR_H_REG … #define HCLGE_RING_TX_BD_NUM_REG … #define HCLGE_RING_TX_PRIORITY_REG … #define HCLGE_RING_TX_TC_REG … #define HCLGE_RING_TX_MERGE_EN_REG … #define HCLGE_RING_TX_TAIL_REG … #define HCLGE_RING_TX_HEAD_REG … #define HCLGE_RING_TX_FBD_NUM_REG … #define HCLGE_RING_TX_OFFSET_REG … #define HCLGE_RING_TX_EBD_NUM_REG … #define HCLGE_RING_TX_EBD_OFFSET_REG … #define HCLGE_RING_TX_BD_ERR_REG … #define HCLGE_RING_EN_REG … /* bar registers for tqp interrupt */ #define HCLGE_TQP_INTR_CTRL_REG … #define HCLGE_TQP_INTR_GL0_REG … #define HCLGE_TQP_INTR_GL1_REG … #define HCLGE_TQP_INTR_GL2_REG … #define HCLGE_TQP_INTR_RL_REG … #define HCLGE_RSS_IND_TBL_SIZE … #define HCLGE_RSS_TC_SIZE_0 … #define HCLGE_RSS_TC_SIZE_1 … #define HCLGE_RSS_TC_SIZE_2 … #define HCLGE_RSS_TC_SIZE_3 … #define HCLGE_RSS_TC_SIZE_4 … #define HCLGE_RSS_TC_SIZE_5 … #define HCLGE_RSS_TC_SIZE_6 … #define HCLGE_RSS_TC_SIZE_7 … #define HCLGE_UMV_TBL_SIZE … #define HCLGE_DEFAULT_UMV_SPACE_PER_PF … #define HCLGE_TQP_RESET_TRY_TIMES … #define HCLGE_PHY_PAGE_MDIX … #define HCLGE_PHY_PAGE_COPPER … /* Page Selection Reg. */ #define HCLGE_PHY_PAGE_REG … /* Copper Specific Control Register */ #define HCLGE_PHY_CSC_REG … /* Copper Specific Status Register */ #define HCLGE_PHY_CSS_REG … #define HCLGE_PHY_MDIX_CTRL_S … #define HCLGE_PHY_MDIX_CTRL_M … #define HCLGE_PHY_MDIX_STATUS_B … #define HCLGE_PHY_SPEED_DUP_RESOLVE_B … #define HCLGE_GET_DFX_REG_TYPE_CNT … /* Factor used to calculate offset and bitmap of VF num */ #define HCLGE_VF_NUM_PER_CMD … #define HCLGE_MAX_QSET_NUM … #define HCLGE_DBG_RESET_INFO_LEN … enum HLCGE_PORT_TYPE { … }; #define PF_VPORT_ID … #define HCLGE_PF_ID_S … #define HCLGE_PF_ID_M … #define HCLGE_VF_ID_S … #define HCLGE_VF_ID_M … #define HCLGE_PORT_TYPE_B … #define HCLGE_NETWORK_PORT_ID_S … #define HCLGE_NETWORK_PORT_ID_M … /* Reset related Registers */ #define HCLGE_PF_OTHER_INT_REG … #define HCLGE_MISC_RESET_STS_REG … #define HCLGE_MISC_VECTOR_INT_STS … #define HCLGE_GLOBAL_RESET_REG … #define HCLGE_GLOBAL_RESET_BIT … #define HCLGE_CORE_RESET_BIT … #define HCLGE_IMP_RESET_BIT … #define HCLGE_RESET_INT_M … #define HCLGE_FUN_RST_ING … #define HCLGE_FUN_RST_ING_B … /* Vector0 register bits define */ #define HCLGE_VECTOR0_REG_PTP_INT_B … #define HCLGE_VECTOR0_GLOBALRESET_INT_B … #define HCLGE_VECTOR0_CORERESET_INT_B … #define HCLGE_VECTOR0_IMPRESET_INT_B … /* Vector0 interrupt CMDQ event source register(RW) */ #define HCLGE_VECTOR0_CMDQ_SRC_REG … /* CMDQ register bits for RX event(=MBX event) */ #define HCLGE_VECTOR0_RX_CMDQ_INT_B … #define HCLGE_VECTOR0_IMP_RESET_INT_B … #define HCLGE_VECTOR0_IMP_CMDQ_ERR_B … #define HCLGE_VECTOR0_IMP_RD_POISON_B … #define HCLGE_VECTOR0_ALL_MSIX_ERR_B … #define HCLGE_TRIGGER_IMP_RESET_B … #define HCLGE_TQP_MEM_SIZE … #define HCLGE_MEM_BAR … /* in the bar4, the first half is for roce, and the second half is for nic */ #define HCLGE_NIC_MEM_OFFSET(hdev) … #define HCLGE_TQP_MEM_OFFSET(hdev, i) … #define HCLGE_MAC_DEFAULT_FRAME … #define HCLGE_MAC_MIN_FRAME … #define HCLGE_MAC_MAX_FRAME … #define HCLGE_SUPPORT_1G_BIT … #define HCLGE_SUPPORT_10G_BIT … #define HCLGE_SUPPORT_25G_BIT … #define HCLGE_SUPPORT_50G_R2_BIT … #define HCLGE_SUPPORT_100G_R4_BIT … /* to be compatible with exsit board */ #define HCLGE_SUPPORT_40G_BIT … #define HCLGE_SUPPORT_100M_BIT … #define HCLGE_SUPPORT_10M_BIT … #define HCLGE_SUPPORT_200G_R4_EXT_BIT … #define HCLGE_SUPPORT_50G_R1_BIT … #define HCLGE_SUPPORT_100G_R2_BIT … #define HCLGE_SUPPORT_200G_R4_BIT … #define HCLGE_SUPPORT_GE … #define HCLGE_SUPPORT_50G_BITS … #define HCLGE_SUPPORT_100G_BITS … #define HCLGE_SUPPORT_200G_BITS … enum HCLGE_DEV_STATE { … }; enum hclge_evt_cause { … }; enum HCLGE_MAC_SPEED { … }; enum HCLGE_MAC_DUPLEX { … }; /* hilink version */ enum hclge_hilink_version { … }; #define QUERY_SFP_SPEED … #define QUERY_ACTIVE_SPEED … struct hclge_wol_info { … }; struct hclge_mac { … }; struct hclge_hw { … }; enum hclge_fc_mode { … }; #define HCLGE_FILTER_TYPE_VF … #define HCLGE_FILTER_TYPE_PORT … #define HCLGE_FILTER_FE_EGRESS_V1_B … #define HCLGE_FILTER_FE_NIC_INGRESS_B … #define HCLGE_FILTER_FE_NIC_EGRESS_B … #define HCLGE_FILTER_FE_ROCE_INGRESS_B … #define HCLGE_FILTER_FE_ROCE_EGRESS_B … #define HCLGE_FILTER_FE_EGRESS … #define HCLGE_FILTER_FE_INGRESS … enum hclge_vlan_fltr_cap { … }; enum hclge_link_fail_code { … }; #define HCLGE_LINK_STATUS_DOWN … #define HCLGE_LINK_STATUS_UP … #define HCLGE_PG_NUM … #define HCLGE_SCH_MODE_SP … #define HCLGE_SCH_MODE_DWRR … struct hclge_pg_info { … }; struct hclge_tc_info { … }; struct hclge_cfg { … }; struct hclge_tm_info { … }; /* max number of mac statistics on each version */ #define HCLGE_MAC_STATS_MAX_NUM_V1 … #define HCLGE_MAC_STATS_MAX_NUM_V2 … struct hclge_comm_stats_str { … }; /* mac stats ,opcode id: 0x0032 */ struct hclge_mac_stats { … }; #define HCLGE_STATS_TIMER_INTERVAL … /* fec stats ,opcode id: 0x0316 */ #define HCLGE_FEC_STATS_MAX_LANES … struct hclge_fec_stats { … }; struct hclge_vlan_type_cfg { … }; enum HCLGE_FD_MODE { … }; enum HCLGE_FD_KEY_TYPE { … }; enum HCLGE_FD_STAGE { … }; /* OUTER_XXX indicates tuples in tunnel header of tunnel packet * INNER_XXX indicate tuples in tunneled header of tunnel packet or * tuples of non-tunnel packet */ enum HCLGE_FD_TUPLE { … }; #define HCLGE_FD_TUPLE_USER_DEF_TUPLES … enum HCLGE_FD_META_DATA { … }; enum HCLGE_FD_KEY_OPT { … }; struct key_info { … }; #define MAX_KEY_LENGTH … #define MAX_KEY_DWORDS … #define MAX_KEY_BYTES … #define MAX_META_DATA_LENGTH … #define HCLGE_FD_MAX_USER_DEF_OFFSET … #define HCLGE_FD_USER_DEF_DATA … #define HCLGE_FD_USER_DEF_OFFSET … #define HCLGE_FD_USER_DEF_OFFSET_UNMASK … /* assigned by firmware, the real filter number for each pf may be less */ #define MAX_FD_FILTER_NUM … #define HCLGE_ARFS_EXPIRE_INTERVAL … #define hclge_read_dev(a, reg) … #define hclge_write_dev(a, reg, value) … enum HCLGE_FD_ACTIVE_RULE_TYPE { … }; enum HCLGE_FD_PACKET_TYPE { … }; enum HCLGE_FD_ACTION { … }; enum HCLGE_FD_NODE_STATE { … }; enum HCLGE_FD_USER_DEF_LAYER { … }; #define HCLGE_FD_USER_DEF_LAYER_NUM … struct hclge_fd_user_def_cfg { … }; struct hclge_fd_user_def_info { … }; struct hclge_fd_key_cfg { … }; struct hclge_fd_cfg { … }; #define IPV4_INDEX … #define IPV6_SIZE … struct hclge_fd_rule_tuples { … }; struct hclge_fd_rule { … }; struct hclge_fd_ad_data { … }; enum HCLGE_MAC_NODE_STATE { … }; struct hclge_mac_node { … }; enum HCLGE_MAC_ADDR_TYPE { … }; struct hclge_vport_vlan_cfg { … }; struct hclge_rst_stats { … }; /* time and register status when mac tunnel interruption occur */ struct hclge_mac_tnl_stats { … }; #define HCLGE_RESET_INTERVAL … #define HCLGE_WAIT_RESET_DONE … #pragma pack(1) struct hclge_vf_vlan_cfg { … }; #pragma pack() /* For each bit of TCAM entry, it uses a pair of 'x' and * 'y' to indicate which value to match, like below: * ---------------------------------- * | bit x | bit y | search value | * ---------------------------------- * | 0 | 0 | always hit | * ---------------------------------- * | 1 | 0 | match '0' | * ---------------------------------- * | 0 | 1 | match '1' | * ---------------------------------- * | 1 | 1 | invalid | * ---------------------------------- * Then for input key(k) and mask(v), we can calculate the value by * the formulae: * x = (~k) & v * y = k & v */ #define calc_x(x, k, v) … #define calc_y(y, k, v) … #define HCLGE_MAC_STATS_FIELD_OFF(f) … #define HCLGE_STATS_READ(p, offset) … #define HCLGE_MAC_TNL_LOG_SIZE … #define HCLGE_VPORT_NUM … struct hclge_dev { … }; /* VPort level vlan tag configuration for TX direction */ struct hclge_tx_vtag_cfg { … }; /* VPort level vlan tag configuration for RX direction */ struct hclge_rx_vtag_cfg { … }; enum HCLGE_VPORT_STATE { … }; enum HCLGE_VPORT_NEED_NOTIFY { … }; struct hclge_vlan_info { … }; struct hclge_port_base_vlan_config { … }; struct hclge_vf_info { … }; struct hclge_vport { … }; struct hclge_speed_bit_map { … }; struct hclge_mac_speed_map { … }; struct hclge_link_mode_bmap { … }; int hclge_set_vport_promisc_mode(struct hclge_vport *vport, bool en_uc_pmc, bool en_mc_pmc, bool en_bc_pmc); int hclge_add_uc_addr_common(struct hclge_vport *vport, const unsigned char *addr); int hclge_rm_uc_addr_common(struct hclge_vport *vport, const unsigned char *addr); int hclge_add_mc_addr_common(struct hclge_vport *vport, const unsigned char *addr); int hclge_rm_mc_addr_common(struct hclge_vport *vport, const unsigned char *addr); struct hclge_vport *hclge_get_vport(struct hnae3_handle *handle); int hclge_bind_ring_with_vector(struct hclge_vport *vport, int vector_id, bool en, struct hnae3_ring_chain_node *ring_chain); static inline int hclge_get_queue_id(struct hnae3_queue *queue) { … } int hclge_inform_reset_assert_to_vf(struct hclge_vport *vport); int hclge_cfg_mac_speed_dup(struct hclge_dev *hdev, int speed, u8 duplex, u8 lane_num); int hclge_set_vlan_filter(struct hnae3_handle *handle, __be16 proto, u16 vlan_id, bool is_kill); int hclge_en_hw_strip_rxvtag(struct hnae3_handle *handle, bool enable); int hclge_buffer_alloc(struct hclge_dev *hdev); int hclge_rss_init_hw(struct hclge_dev *hdev); void hclge_mbx_handler(struct hclge_dev *hdev); int hclge_reset_tqp(struct hnae3_handle *handle); int hclge_cfg_flowctrl(struct hclge_dev *hdev); int hclge_func_reset_cmd(struct hclge_dev *hdev, int func_id); int hclge_vport_start(struct hclge_vport *vport); void hclge_vport_stop(struct hclge_vport *vport); int hclge_set_vport_mtu(struct hclge_vport *vport, int new_mtu); int hclge_dbg_read_cmd(struct hnae3_handle *handle, enum hnae3_dbg_cmd cmd, char *buf, int len); u16 hclge_covert_handle_qid_global(struct hnae3_handle *handle, u16 queue_id); int hclge_notify_client(struct hclge_dev *hdev, enum hnae3_reset_notify_type type); int hclge_update_mac_list(struct hclge_vport *vport, enum HCLGE_MAC_NODE_STATE state, enum HCLGE_MAC_ADDR_TYPE mac_type, const unsigned char *addr); int hclge_update_mac_node_for_dev_addr(struct hclge_vport *vport, const u8 *old_addr, const u8 *new_addr); void hclge_rm_vport_all_mac_table(struct hclge_vport *vport, bool is_del_list, enum HCLGE_MAC_ADDR_TYPE mac_type); void hclge_rm_vport_all_vlan_table(struct hclge_vport *vport, bool is_del_list); void hclge_uninit_vport_vlan_table(struct hclge_dev *hdev); void hclge_restore_mac_table_common(struct hclge_vport *vport); void hclge_restore_vport_port_base_vlan_config(struct hclge_dev *hdev); void hclge_restore_vport_vlan_table(struct hclge_vport *vport); int hclge_update_port_base_vlan_cfg(struct hclge_vport *vport, u16 state, struct hclge_vlan_info *vlan_info); int hclge_push_vf_port_base_vlan_info(struct hclge_vport *vport, u8 vfid, u16 state, struct hclge_vlan_info *vlan_info); void hclge_task_schedule(struct hclge_dev *hdev, unsigned long delay_time); void hclge_report_hw_error(struct hclge_dev *hdev, enum hnae3_hw_error_type type); int hclge_dbg_dump_rst_info(struct hclge_dev *hdev, char *buf, int len); int hclge_push_vf_link_status(struct hclge_vport *vport); int hclge_enable_vport_vlan_filter(struct hclge_vport *vport, bool request_en); int hclge_mac_update_stats(struct hclge_dev *hdev); struct hclge_vport *hclge_get_vf_vport(struct hclge_dev *hdev, int vf); int hclge_inform_vf_reset(struct hclge_vport *vport, u16 reset_type); int hclge_query_scc_version(struct hclge_dev *hdev, u32 *scc_version); #endif
Codebase Browser
linux