linux/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_mdio.c

// SPDX-License-Identifier: GPL-2.0+
// Copyright (c) 2016-2017 Hisilicon Limited.

#include <linux/etherdevice.h>
#include <linux/kernel.h>
#include <linux/marvell_phy.h>

#include "hclge_cmd.h"
#include "hclge_main.h"
#include "hclge_mdio.h"

enum hclge_mdio_c22_op_seq {};

#define HCLGE_MDIO_CTRL_START_B
#define HCLGE_MDIO_CTRL_ST_S
#define HCLGE_MDIO_CTRL_ST_M
#define HCLGE_MDIO_CTRL_OP_S
#define HCLGE_MDIO_CTRL_OP_M

#define HCLGE_MDIO_PHYID_S
#define HCLGE_MDIO_PHYID_M

#define HCLGE_MDIO_PHYREG_S
#define HCLGE_MDIO_PHYREG_M

#define HCLGE_MDIO_STA_B

struct hclge_mdio_cfg_cmd {};

static int hclge_mdio_write(struct mii_bus *bus, int phyid, int regnum,
			    u16 data)
{}

static int hclge_mdio_read(struct mii_bus *bus, int phyid, int regnum)
{}

int hclge_mac_mdio_config(struct hclge_dev *hdev)
{}

static void hclge_mac_adjust_link(struct net_device *netdev)
{}

int hclge_mac_connect_phy(struct hnae3_handle *handle)
{}

void hclge_mac_disconnect_phy(struct hnae3_handle *handle)
{}

void hclge_mac_start_phy(struct hclge_dev *hdev)
{}

void hclge_mac_stop_phy(struct hclge_dev *hdev)
{}

u16 hclge_read_phy_reg(struct hclge_dev *hdev, u16 reg_addr)
{}

int hclge_write_phy_reg(struct hclge_dev *hdev, u16 reg_addr, u16 val)
{}