linux/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_tm.c

// SPDX-License-Identifier: GPL-2.0+
// Copyright (c) 2016-2017 Hisilicon Limited.

#include <linux/etherdevice.h>

#include "hclge_cmd.h"
#include "hclge_main.h"
#include "hclge_tm.h"

enum hclge_shaper_level {};

#define HCLGE_TM_PFC_PKT_GET_CMD_NUM
#define HCLGE_TM_PFC_NUM_GET_PER_CMD

#define HCLGE_SHAPER_BS_U_DEF
#define HCLGE_SHAPER_BS_S_DEF

/* hclge_shaper_para_calc: calculate ir parameter for the shaper
 * @ir: Rate to be config, its unit is Mbps
 * @shaper_level: the shaper level. eg: port, pg, priority, queueset
 * @ir_para: parameters of IR shaper
 * @max_tm_rate: max tm rate is available to config
 *
 * the formula:
 *
 *		IR_b * (2 ^ IR_u) * 8
 * IR(Mbps) = -------------------------  *  CLOCK(1000Mbps)
 *		Tick * (2 ^ IR_s)
 *
 * @return: 0: calculate sucessful, negative: fail
 */
static int hclge_shaper_para_calc(u32 ir, u8 shaper_level,
				  struct hclge_shaper_ir_para *ir_para,
				  u32 max_tm_rate)
{}

static const u16 hclge_pfc_tx_stats_offset[] =;

static const u16 hclge_pfc_rx_stats_offset[] =;

static void hclge_pfc_stats_get(struct hclge_dev *hdev, bool tx, u64 *stats)
{}

void hclge_pfc_rx_stats_get(struct hclge_dev *hdev, u64 *stats)
{}

void hclge_pfc_tx_stats_get(struct hclge_dev *hdev, u64 *stats)
{}

int hclge_mac_pause_en_cfg(struct hclge_dev *hdev, bool tx, bool rx)
{}

int hclge_pfc_pause_en_cfg(struct hclge_dev *hdev, u8 tx_rx_bitmap,
			   u8 pfc_bitmap)
{}

static int hclge_pause_param_cfg(struct hclge_dev *hdev, const u8 *addr,
				 u8 pause_trans_gap, u16 pause_trans_time)
{}

int hclge_pause_addr_cfg(struct hclge_dev *hdev, const u8 *mac_addr)
{}

static int hclge_fill_pri_array(struct hclge_dev *hdev, u8 *pri, u8 pri_id)
{}

int hclge_up_to_tc_map(struct hclge_dev *hdev)
{}

static void hclge_dscp_to_prio_map_init(struct hclge_dev *hdev)
{}

int hclge_dscp_to_tc_map(struct hclge_dev *hdev)
{}

static int hclge_tm_pg_to_pri_map_cfg(struct hclge_dev *hdev,
				      u8 pg_id, u8 pri_bit_map)
{}

static int hclge_tm_qs_to_pri_map_cfg(struct hclge_dev *hdev, u16 qs_id, u8 pri,
				      bool link_vld)
{}

static int hclge_tm_q_to_qs_map_cfg(struct hclge_dev *hdev,
				    u16 q_id, u16 qs_id)
{}

static int hclge_tm_pg_weight_cfg(struct hclge_dev *hdev, u8 pg_id,
				  u8 dwrr)
{}

static int hclge_tm_pri_weight_cfg(struct hclge_dev *hdev, u8 pri_id,
				   u8 dwrr)
{}

static int hclge_tm_qs_weight_cfg(struct hclge_dev *hdev, u16 qs_id,
				  u8 dwrr)
{}

static u32 hclge_tm_get_shapping_para(u8 ir_b, u8 ir_u, u8 ir_s,
				      u8 bs_b, u8 bs_s)
{}

static int hclge_tm_pg_shapping_cfg(struct hclge_dev *hdev,
				    enum hclge_shap_bucket bucket, u8 pg_id,
				    u32 shapping_para, u32 rate)
{}

int hclge_tm_port_shaper_cfg(struct hclge_dev *hdev)
{}

static int hclge_tm_pri_shapping_cfg(struct hclge_dev *hdev,
				     enum hclge_shap_bucket bucket, u8 pri_id,
				     u32 shapping_para, u32 rate)
{}

static int hclge_tm_pg_schd_mode_cfg(struct hclge_dev *hdev, u8 pg_id)
{}

static int hclge_tm_pri_schd_mode_cfg(struct hclge_dev *hdev, u8 pri_id)
{}

static int hclge_tm_qs_schd_mode_cfg(struct hclge_dev *hdev, u16 qs_id, u8 mode)
{}

static int hclge_tm_qs_bp_cfg(struct hclge_dev *hdev, u8 tc, u8 grp_id,
			      u32 bit_map)
{}

int hclge_tm_qs_shaper_cfg(struct hclge_vport *vport, int max_tx_rate)
{}

static u16 hclge_vport_get_max_rss_size(struct hclge_vport *vport)
{}

static u16 hclge_vport_get_tqp_num(struct hclge_vport *vport)
{}

static void hclge_tm_update_kinfo_rss_size(struct hclge_vport *vport)
{}

static void hclge_tm_vport_tc_info_update(struct hclge_vport *vport)
{}

static void hclge_tm_vport_info_update(struct hclge_dev *hdev)
{}

static void hclge_tm_tc_info_init(struct hclge_dev *hdev)
{}

static void hclge_tm_pg_info_init(struct hclge_dev *hdev)
{}

static void hclge_update_fc_mode_by_dcb_flag(struct hclge_dev *hdev)
{}

static void hclge_update_fc_mode(struct hclge_dev *hdev)
{}

void hclge_tm_pfc_info_update(struct hclge_dev *hdev)
{}

static void hclge_tm_schd_info_init(struct hclge_dev *hdev)
{}

static int hclge_tm_pg_to_pri_map(struct hclge_dev *hdev)
{}

static int hclge_tm_pg_shaper_cfg(struct hclge_dev *hdev)
{}

static int hclge_tm_pg_dwrr_cfg(struct hclge_dev *hdev)
{}

static int hclge_vport_q_to_qs_map(struct hclge_dev *hdev,
				   struct hclge_vport *vport)
{}

static int hclge_tm_pri_q_qs_cfg_tc_base(struct hclge_dev *hdev)
{}

static int hclge_tm_pri_q_qs_cfg_vnet_base(struct hclge_dev *hdev)
{}

static int hclge_tm_pri_q_qs_cfg(struct hclge_dev *hdev)
{}

static int hclge_tm_pri_tc_base_shaper_cfg(struct hclge_dev *hdev)
{}

static int hclge_tm_pri_vnet_base_shaper_pri_cfg(struct hclge_vport *vport)
{}

static int hclge_tm_pri_vnet_base_shaper_qs_cfg(struct hclge_vport *vport)
{}

static int hclge_tm_pri_vnet_base_shaper_cfg(struct hclge_dev *hdev)
{}

static int hclge_tm_pri_shaper_cfg(struct hclge_dev *hdev)
{}

static int hclge_tm_pri_tc_base_dwrr_cfg(struct hclge_dev *hdev)
{}

static int hclge_tm_ets_tc_dwrr_cfg(struct hclge_dev *hdev)
{}

static int hclge_tm_pri_vnet_base_dwrr_pri_cfg(struct hclge_vport *vport)
{}

static int hclge_tm_pri_vnet_base_dwrr_cfg(struct hclge_dev *hdev)
{}

static int hclge_tm_pri_dwrr_cfg(struct hclge_dev *hdev)
{}

static int hclge_tm_map_cfg(struct hclge_dev *hdev)
{}

static int hclge_tm_shaper_cfg(struct hclge_dev *hdev)
{}

int hclge_tm_dwrr_cfg(struct hclge_dev *hdev)
{}

static int hclge_tm_lvl2_schd_mode_cfg(struct hclge_dev *hdev)
{}

static int hclge_tm_schd_mode_tc_base_cfg(struct hclge_dev *hdev, u8 pri_id)
{}

static int hclge_tm_schd_mode_vnet_base_cfg(struct hclge_vport *vport)
{}

static int hclge_tm_lvl34_schd_mode_cfg(struct hclge_dev *hdev)
{}

static int hclge_tm_schd_mode_hw(struct hclge_dev *hdev)
{}

int hclge_tm_schd_setup_hw(struct hclge_dev *hdev)
{}

static int hclge_pause_param_setup_hw(struct hclge_dev *hdev)
{}

static int hclge_pfc_setup_hw(struct hclge_dev *hdev)
{}

/* for the queues that use for backpress, divides to several groups,
 * each group contains 32 queue sets, which can be represented by u32 bitmap.
 */
static int hclge_bp_setup_hw(struct hclge_dev *hdev, u8 tc)
{}

int hclge_mac_pause_setup_hw(struct hclge_dev *hdev)
{}

static int hclge_tm_bp_setup(struct hclge_dev *hdev)
{}

int hclge_pause_setup_hw(struct hclge_dev *hdev, bool init)
{}

void hclge_tm_prio_tc_info_update(struct hclge_dev *hdev, u8 *prio_tc)
{}

void hclge_tm_schd_info_update(struct hclge_dev *hdev, u8 num_tc)
{}

int hclge_tm_init_hw(struct hclge_dev *hdev, bool init)
{}

int hclge_tm_schd_init(struct hclge_dev *hdev)
{}

int hclge_tm_vport_map_update(struct hclge_dev *hdev)
{}

int hclge_tm_get_qset_num(struct hclge_dev *hdev, u16 *qset_num)
{}

int hclge_tm_get_pri_num(struct hclge_dev *hdev, u8 *pri_num)
{}

int hclge_tm_get_qset_map_pri(struct hclge_dev *hdev, u16 qset_id, u8 *priority,
			      u8 *link_vld)
{}

int hclge_tm_get_qset_sch_mode(struct hclge_dev *hdev, u16 qset_id, u8 *mode)
{}

int hclge_tm_get_qset_weight(struct hclge_dev *hdev, u16 qset_id, u8 *weight)
{}

int hclge_tm_get_qset_shaper(struct hclge_dev *hdev, u16 qset_id,
			     struct hclge_tm_shaper_para *para)
{}

int hclge_tm_get_pri_sch_mode(struct hclge_dev *hdev, u8 pri_id, u8 *mode)
{}

int hclge_tm_get_pri_weight(struct hclge_dev *hdev, u8 pri_id, u8 *weight)
{}

int hclge_tm_get_pri_shaper(struct hclge_dev *hdev, u8 pri_id,
			    enum hclge_opcode_type cmd,
			    struct hclge_tm_shaper_para *para)
{}

int hclge_tm_get_q_to_qs_map(struct hclge_dev *hdev, u16 q_id, u16 *qset_id)
{}

int hclge_tm_get_q_to_tc(struct hclge_dev *hdev, u16 q_id, u8 *tc_id)
{}

int hclge_tm_get_pg_to_pri_map(struct hclge_dev *hdev, u8 pg_id,
			       u8 *pri_bit_map)
{}

int hclge_tm_get_pg_weight(struct hclge_dev *hdev, u8 pg_id, u8 *weight)
{}

int hclge_tm_get_pg_sch_mode(struct hclge_dev *hdev, u8 pg_id, u8 *mode)
{}

int hclge_tm_get_pg_shaper(struct hclge_dev *hdev, u8 pg_id,
			   enum hclge_opcode_type cmd,
			   struct hclge_tm_shaper_para *para)
{}

int hclge_tm_get_port_shaper(struct hclge_dev *hdev,
			     struct hclge_tm_shaper_para *para)
{}

int hclge_tm_flush_cfg(struct hclge_dev *hdev, bool enable)
{}

void hclge_reset_tc_config(struct hclge_dev *hdev)
{}