linux/drivers/net/ethernet/hisilicon/hns3/hns3pf/hclge_ptp.c

// SPDX-License-Identifier: GPL-2.0+
// Copyright (c) 2021 Hisilicon Limited.

#include <linux/skbuff.h>
#include "hclge_main.h"
#include "hnae3.h"

static int hclge_ptp_get_cycle(struct hclge_dev *hdev)
{ … }

static int hclge_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)
{ … }

bool hclge_ptp_set_tx_info(struct hnae3_handle *handle, struct sk_buff *skb)
{ … }

void hclge_ptp_clean_tx_hwts(struct hclge_dev *hdev)
{ … }

void hclge_ptp_get_rx_hwts(struct hnae3_handle *handle, struct sk_buff *skb,
			   u32 nsec, u32 sec)
{ … }

static int hclge_ptp_gettimex(struct ptp_clock_info *ptp, struct timespec64 *ts,
			      struct ptp_system_timestamp *sts)
{ … }

static int hclge_ptp_settime(struct ptp_clock_info *ptp,
			     const struct timespec64 *ts)
{ … }

static int hclge_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
{ … }

int hclge_ptp_get_cfg(struct hclge_dev *hdev, struct ifreq *ifr)
{ … }

static int hclge_ptp_int_en(struct hclge_dev *hdev, bool en)
{ … }

int hclge_ptp_cfg_qry(struct hclge_dev *hdev, u32 *cfg)
{ … }

static int hclge_ptp_cfg(struct hclge_dev *hdev, u32 cfg)
{ … }

static int hclge_ptp_set_tx_mode(struct hwtstamp_config *cfg,
				 unsigned long *flags, u32 *ptp_cfg)
{ … }

static int hclge_ptp_set_rx_mode(struct hwtstamp_config *cfg,
				 unsigned long *flags, u32 *ptp_cfg)
{ … }

static int hclge_ptp_set_ts_mode(struct hclge_dev *hdev,
				 struct hwtstamp_config *cfg)
{ … }

int hclge_ptp_set_cfg(struct hclge_dev *hdev, struct ifreq *ifr)
{ … }

int hclge_ptp_get_ts_info(struct hnae3_handle *handle,
			  struct kernel_ethtool_ts_info *info)
{ … }

static int hclge_ptp_create_clock(struct hclge_dev *hdev)
{ … }

static void hclge_ptp_destroy_clock(struct hclge_dev *hdev)
{ … }

int hclge_ptp_init(struct hclge_dev *hdev)
{ … }

void hclge_ptp_uninit(struct hclge_dev *hdev)
{ … }