// SPDX-License-Identifier: GPL-2.0+ /* * Standard PCI Hot Plug Driver * * Copyright (C) 1995,2001 Compaq Computer Corporation * Copyright (C) 2001 Greg Kroah-Hartman ([email protected]) * Copyright (C) 2001 IBM Corp. * Copyright (C) 2003-2004 Intel Corporation * * All rights reserved. * * Send feedback to <[email protected]>,<[email protected]> * */ #include <linux/kernel.h> #include <linux/module.h> #include <linux/types.h> #include <linux/pci.h> #include <linux/interrupt.h> #include "shpchp.h" /* Slot Available Register I field definition */ #define SLOT_33MHZ … #define SLOT_66MHZ_PCIX … #define SLOT_100MHZ_PCIX … #define SLOT_133MHZ_PCIX … /* Slot Available Register II field definition */ #define SLOT_66MHZ … #define SLOT_66MHZ_PCIX_266 … #define SLOT_100MHZ_PCIX_266 … #define SLOT_133MHZ_PCIX_266 … #define SLOT_66MHZ_PCIX_533 … #define SLOT_100MHZ_PCIX_533 … #define SLOT_133MHZ_PCIX_533 … /* Slot Configuration */ #define SLOT_NUM … #define FIRST_DEV_NUM … #define PSN … #define UPDOWN … #define MRLSENSOR … #define ATTN_BUTTON … /* * Interrupt Locator Register definitions */ #define CMD_INTR_PENDING … #define SLOT_INTR_PENDING(i) … /* * Controller SERR-INT Register */ #define GLOBAL_INTR_MASK … #define GLOBAL_SERR_MASK … #define COMMAND_INTR_MASK … #define ARBITER_SERR_MASK … #define COMMAND_DETECTED … #define ARBITER_DETECTED … #define SERR_INTR_RSVDZ_MASK … /* * Logical Slot Register definitions */ #define SLOT_REG(i) … #define SLOT_STATE_SHIFT … #define SLOT_STATE_MASK … #define SLOT_STATE_PWRONLY … #define SLOT_STATE_ENABLED … #define SLOT_STATE_DISABLED … #define PWR_LED_STATE_SHIFT … #define PWR_LED_STATE_MASK … #define ATN_LED_STATE_SHIFT … #define ATN_LED_STATE_MASK … #define ATN_LED_STATE_ON … #define ATN_LED_STATE_BLINK … #define ATN_LED_STATE_OFF … #define POWER_FAULT … #define ATN_BUTTON … #define MRL_SENSOR … #define MHZ66_CAP … #define PRSNT_SHIFT … #define PRSNT_MASK … #define PCIX_CAP_SHIFT … #define PCIX_CAP_MASK_PI1 … #define PCIX_CAP_MASK_PI2 … #define PRSNT_CHANGE_DETECTED … #define ISO_PFAULT_DETECTED … #define BUTTON_PRESS_DETECTED … #define MRL_CHANGE_DETECTED … #define CON_PFAULT_DETECTED … #define PRSNT_CHANGE_INTR_MASK … #define ISO_PFAULT_INTR_MASK … #define BUTTON_PRESS_INTR_MASK … #define MRL_CHANGE_INTR_MASK … #define CON_PFAULT_INTR_MASK … #define MRL_CHANGE_SERR_MASK … #define CON_PFAULT_SERR_MASK … #define SLOT_REG_RSVDZ_MASK … /* * SHPC Command Code definitions * * Slot Operation 00h - 3Fh * Set Bus Segment Speed/Mode A 40h - 47h * Power-Only All Slots 48h * Enable All Slots 49h * Set Bus Segment Speed/Mode B (PI=2) 50h - 5Fh * Reserved Command Codes 60h - BFh * Vendor Specific Commands C0h - FFh */ #define SET_SLOT_PWR … #define SET_SLOT_ENABLE … #define SET_SLOT_DISABLE … #define SET_PWR_ON … #define SET_PWR_BLINK … #define SET_PWR_OFF … #define SET_ATTN_ON … #define SET_ATTN_BLINK … #define SET_ATTN_OFF … #define SETA_PCI_33MHZ … #define SETA_PCI_66MHZ … #define SETA_PCIX_66MHZ … #define SETA_PCIX_100MHZ … #define SETA_PCIX_133MHZ … #define SETA_RESERVED1 … #define SETA_RESERVED2 … #define SETA_RESERVED3 … #define SET_PWR_ONLY_ALL … #define SET_ENABLE_ALL … #define SETB_PCI_33MHZ … #define SETB_PCI_66MHZ … #define SETB_PCIX_66MHZ_PM … #define SETB_PCIX_100MHZ_PM … #define SETB_PCIX_133MHZ_PM … #define SETB_PCIX_66MHZ_EM … #define SETB_PCIX_100MHZ_EM … #define SETB_PCIX_133MHZ_EM … #define SETB_PCIX_66MHZ_266 … #define SETB_PCIX_100MHZ_266 … #define SETB_PCIX_133MHZ_266 … #define SETB_PCIX_66MHZ_533 … #define SETB_PCIX_100MHZ_533 … #define SETB_PCIX_133MHZ_533 … #define SETB_RESERVED1 … #define SETB_RESERVED2 … /* * SHPC controller command error code */ #define SWITCH_OPEN … #define INVALID_CMD … #define INVALID_SPEED_MODE … /* * For accessing SHPC Working Register Set via PCI Configuration Space */ #define DWORD_SELECT … #define DWORD_DATA … /* Field Offset in Logical Slot Register - byte boundary */ #define SLOT_EVENT_LATCH … #define SLOT_SERR_INT_MASK … static irqreturn_t shpc_isr(int irq, void *dev_id); static void start_int_poll_timer(struct controller *ctrl, int sec); static int hpc_check_cmd_status(struct controller *ctrl); static inline u8 shpc_readb(struct controller *ctrl, int reg) { … } static inline u16 shpc_readw(struct controller *ctrl, int reg) { … } static inline void shpc_writew(struct controller *ctrl, int reg, u16 val) { … } static inline u32 shpc_readl(struct controller *ctrl, int reg) { … } static inline void shpc_writel(struct controller *ctrl, int reg, u32 val) { … } static inline int shpc_indirect_read(struct controller *ctrl, int index, u32 *value) { … } /* * This is the interrupt polling timeout function. */ static void int_poll_timeout(struct timer_list *t) { … } /* * This function starts the interrupt polling timer. */ static void start_int_poll_timer(struct controller *ctrl, int sec) { … } static inline int is_ctrl_busy(struct controller *ctrl) { … } /* * Returns 1 if SHPC finishes executing a command within 1 sec, * otherwise returns 0. */ static inline int shpc_poll_ctrl_busy(struct controller *ctrl) { … } static inline int shpc_wait_cmd(struct controller *ctrl) { … } static int shpc_write_cmd(struct slot *slot, u8 t_slot, u8 cmd) { … } static int hpc_check_cmd_status(struct controller *ctrl) { … } static int hpc_get_attention_status(struct slot *slot, u8 *status) { … } static int hpc_get_power_status(struct slot *slot, u8 *status) { … } static int hpc_get_latch_status(struct slot *slot, u8 *status) { … } static int hpc_get_adapter_status(struct slot *slot, u8 *status) { … } static int hpc_get_prog_int(struct slot *slot, u8 *prog_int) { … } static int hpc_get_adapter_speed(struct slot *slot, enum pci_bus_speed *value) { … } static int hpc_query_power_fault(struct slot *slot) { … } static int hpc_set_attention_status(struct slot *slot, u8 value) { … } static void hpc_set_green_led_on(struct slot *slot) { … } static void hpc_set_green_led_off(struct slot *slot) { … } static void hpc_set_green_led_blink(struct slot *slot) { … } static void hpc_release_ctlr(struct controller *ctrl) { … } static int hpc_power_on_slot(struct slot *slot) { … } static int hpc_slot_enable(struct slot *slot) { … } static int hpc_slot_disable(struct slot *slot) { … } static int shpc_get_cur_bus_speed(struct controller *ctrl) { … } static int hpc_set_bus_speed_mode(struct slot *slot, enum pci_bus_speed value) { … } static irqreturn_t shpc_isr(int irq, void *dev_id) { … } static int shpc_get_max_bus_speed(struct controller *ctrl) { … } static const struct hpc_ops shpchp_hpc_ops = …; int shpc_init(struct controller *ctrl, struct pci_dev *pdev) { … }
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