/* SPDX-License-Identifier: GPL-2.0 */ /* * RSS and Classifier definitions for Marvell PPv2 Network Controller * * Copyright (C) 2014 Marvell * * Marcin Wojtas <[email protected]> */ #ifndef _MVPP2_CLS_H_ #define _MVPP2_CLS_H_ #include "mvpp2.h" #include "mvpp2_prs.h" /* Classifier constants */ #define MVPP2_CLS_FLOWS_TBL_SIZE … #define MVPP2_CLS_FLOWS_TBL_DATA_WORDS … #define MVPP2_CLS_LKP_TBL_SIZE … #define MVPP2_CLS_RX_QUEUES … /* Classifier flow constants */ #define MVPP2_FLOW_N_FIELDS … enum mvpp2_cls_engine { … }; #define MVPP22_CLS_HEK_OPT_MAC_DA … #define MVPP22_CLS_HEK_OPT_VLAN_PRI … #define MVPP22_CLS_HEK_OPT_VLAN … #define MVPP22_CLS_HEK_OPT_L3_PROTO … #define MVPP22_CLS_HEK_OPT_IP4SA … #define MVPP22_CLS_HEK_OPT_IP4DA … #define MVPP22_CLS_HEK_OPT_IP6SA … #define MVPP22_CLS_HEK_OPT_IP6DA … #define MVPP22_CLS_HEK_OPT_L4SIP … #define MVPP22_CLS_HEK_OPT_L4DIP … #define MVPP22_CLS_HEK_N_FIELDS … #define MVPP22_CLS_HEK_L4_OPTS … #define MVPP22_CLS_HEK_IP4_2T … #define MVPP22_CLS_HEK_IP6_2T … /* The fifth tuple in "5T" is the L4_Info field */ #define MVPP22_CLS_HEK_IP4_5T … #define MVPP22_CLS_HEK_IP6_5T … #define MVPP22_CLS_HEK_TAGGED … enum mvpp2_cls_field_id { … }; /* Classifier C2 engine constants */ #define MVPP22_CLS_C2_TCAM_EN(data) … enum mvpp22_cls_c2_action { … }; enum mvpp22_cls_c2_fwd_action { … }; enum mvpp22_cls_c2_color_action { … }; #define MVPP2_CLS_C2_TCAM_WORDS … #define MVPP2_CLS_C2_ATTR_WORDS … struct mvpp2_cls_c2_entry { … }; #define MVPP22_FLOW_ETHER_BIT … #define MVPP22_FLOW_IP4_BIT … #define MVPP22_FLOW_IP6_BIT … #define MVPP22_FLOW_TCP_BIT … #define MVPP22_FLOW_UDP_BIT … #define MVPP22_FLOW_TCP4 … #define MVPP22_FLOW_TCP6 … #define MVPP22_FLOW_UDP4 … #define MVPP22_FLOW_UDP6 … #define MVPP22_FLOW_IP4 … #define MVPP22_FLOW_IP6 … #define MVPP22_FLOW_ETHERNET … /* Classifier C2 engine entries */ #define MVPP22_CLS_C2_N_ENTRIES … /* Number of per-port dedicated entries in the C2 TCAM */ #define MVPP22_CLS_C2_PORT_N_FLOWS … /* Each port has one range per flow type + one entry controlling the global RSS * setting and the default rx queue */ #define MVPP22_CLS_C2_PORT_RANGE … #define MVPP22_CLS_C2_PORT_FIRST(p) … #define MVPP22_CLS_C2_RSS_ENTRY(p) … #define MVPP22_CLS_C2_PORT_FLOW_FIRST(p) … #define MVPP22_CLS_C2_RFS_LOC(p, loc) … /* Packet flow ID */ enum mvpp2_prs_flow { … }; /* LU Type defined for all engines, and specified in the flow table */ #define MVPP2_CLS_LU_TYPE_MASK … enum mvpp2_cls_lu_type { … }; #define MVPP2_N_FLOWS … struct mvpp2_cls_flow { … }; #define MVPP2_CLS_FLT_ENTRIES_PER_FLOW … #define MVPP2_CLS_FLT_FIRST(id) … #define MVPP2_CLS_FLT_C2_RFS(port, id, rfs_n) … #define MVPP2_CLS_FLT_C2_RSS_ENTRY(id) … #define MVPP2_CLS_FLT_HASH_ENTRY(port, id) … #define MVPP2_CLS_FLT_LAST(id) … /* Iterate on each classifier flow id. Sets 'i' to be the index of the first * entry in the cls_flows table for each different flow_id. * This relies on entries having the same flow_id in the cls_flows table being * contiguous. */ #define for_each_cls_flow_id(i) … /* Iterate on each classifier flow that has a given flow_type. Sets 'i' to be * the index of the first entry in the cls_flow table for each different flow_id * that has the given flow_type. This allows to operate on all flows that * matches a given ethtool flow type. */ #define for_each_cls_flow_id_with_type(i, type) … #define for_each_cls_flow_id_containing_type(i, type) … struct mvpp2_cls_flow_entry { … }; struct mvpp2_cls_lookup_entry { … }; int mvpp22_port_rss_init(struct mvpp2_port *port); int mvpp22_port_rss_enable(struct mvpp2_port *port); int mvpp22_port_rss_disable(struct mvpp2_port *port); int mvpp22_port_rss_ctx_create(struct mvpp2_port *port, u32 *rss_ctx); int mvpp22_port_rss_ctx_delete(struct mvpp2_port *port, u32 rss_ctx); int mvpp22_port_rss_ctx_indir_set(struct mvpp2_port *port, u32 rss_ctx, const u32 *indir); int mvpp22_port_rss_ctx_indir_get(struct mvpp2_port *port, u32 rss_ctx, u32 *indir); int mvpp2_ethtool_rxfh_get(struct mvpp2_port *port, struct ethtool_rxnfc *info); int mvpp2_ethtool_rxfh_set(struct mvpp2_port *port, struct ethtool_rxnfc *info); void mvpp2_cls_init(struct mvpp2 *priv); void mvpp2_cls_port_config(struct mvpp2_port *port); void mvpp2_cls_oversize_rxq_set(struct mvpp2_port *port); int mvpp2_cls_flow_eng_get(struct mvpp2_cls_flow_entry *fe); u16 mvpp2_flow_get_hek_fields(struct mvpp2_cls_flow_entry *fe); const struct mvpp2_cls_flow *mvpp2_cls_flow_get(int flow); u32 mvpp2_cls_flow_hits(struct mvpp2 *priv, int index); void mvpp2_cls_flow_read(struct mvpp2 *priv, int index, struct mvpp2_cls_flow_entry *fe); u32 mvpp2_cls_lookup_hits(struct mvpp2 *priv, int index); void mvpp2_cls_lookup_read(struct mvpp2 *priv, int lkpid, int way, struct mvpp2_cls_lookup_entry *le); u32 mvpp2_cls_c2_hit_count(struct mvpp2 *priv, int c2_index); void mvpp2_cls_c2_read(struct mvpp2 *priv, int index, struct mvpp2_cls_c2_entry *c2); int mvpp2_ethtool_cls_rule_get(struct mvpp2_port *port, struct ethtool_rxnfc *rxnfc); int mvpp2_ethtool_cls_rule_ins(struct mvpp2_port *port, struct ethtool_rxnfc *info); int mvpp2_ethtool_cls_rule_del(struct mvpp2_port *port, struct ethtool_rxnfc *info); #endif
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