/* SPDX-License-Identifier: GPL-2.0 */ /* Marvell Octeon EP (EndPoint) Ethernet Driver * * Copyright (C) 2020 Marvell. * */ #ifndef _OCTEP_TX_H_ #define _OCTEP_TX_H_ #define IQ_SEND_OK … #define IQ_SEND_STOP … #define IQ_SEND_FAILED … #define TX_BUFTYPE_NONE … #define TX_BUFTYPE_NET … #define TX_BUFTYPE_NET_SG … #define NUM_TX_BUFTYPES … /* Hardware format for Scatter/Gather list * * 63 48|47 32|31 16|15 0 * ----------------------------------------- * | Len 0 | Len 1 | Len 2 | Len 3 | * ----------------------------------------- * | Ptr 0 | * ----------------------------------------- * | Ptr 1 | * ----------------------------------------- * | Ptr 2 | * ----------------------------------------- * | Ptr 3 | * ----------------------------------------- */ struct octep_tx_sglist_desc { … }; static_assert(…); /* Each Scatter/Gather entry sent to hardwar hold four pointers. * So, number of entries required is (MAX_SKB_FRAGS + 1)/4, where '+1' * is for main skb which also goes as a gather buffer to Octeon hardware. * To allocate sufficient SGLIST entries for a packet with max fragments, * align by adding 3 before calcuating max SGLIST entries per packet. */ #define OCTEP_SGLIST_ENTRIES_PER_PKT … #define OCTEP_SGLIST_SIZE_PER_PKT … struct octep_tx_buffer { … }; #define OCTEP_IQ_TXBUFF_INFO_SIZE … /* Hardware interface Tx statistics */ struct octep_iface_tx_stats { … }; /* Input Queue statistics. Each input queue has four stats fields. */ struct octep_iq_stats { … }; /* The instruction (input) queue. * The input queue is used to post raw (instruction) mode data or packet * data to Octeon device from the host. Each input queue (up to 4) for * a Octeon device has one such structure to represent it. */ struct octep_iq { … }; /* Hardware Tx Instruction Header */ struct octep_instr_hdr { … }; static_assert(…); /* Tx offload flags */ #define OCTEP_TX_OFFLOAD_VLAN_INSERT … #define OCTEP_TX_OFFLOAD_IPV4_CKSUM … #define OCTEP_TX_OFFLOAD_UDP_CKSUM … #define OCTEP_TX_OFFLOAD_TCP_CKSUM … #define OCTEP_TX_OFFLOAD_SCTP_CKSUM … #define OCTEP_TX_OFFLOAD_TCP_TSO … #define OCTEP_TX_OFFLOAD_UDP_TSO … #define OCTEP_TX_OFFLOAD_CKSUM … #define OCTEP_TX_OFFLOAD_TSO … #define OCTEP_TX_IP_CSUM(flags) … #define OCTEP_TX_TSO(flags) … struct tx_mdata { … }; static_assert(…); /* 64-byte Tx instruction format. * Format of instruction for a 64-byte mode input queue. * * only first 16-bytes (dptr and ih) are mandatory; rest are optional * and filled by the driver based on firmware/hardware capabilities. * These optional headers together called Front Data and its size is * described by ih->fsz. */ struct octep_tx_desc_hw { … }; static_assert(…); #define OCTEP_IQ_DESC_SIZE … #endif /* _OCTEP_TX_H_ */
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