linux/drivers/net/ethernet/marvell/octeon_ep/octep_rx.h

/* SPDX-License-Identifier: GPL-2.0 */
/* Marvell Octeon EP (EndPoint) Ethernet Driver
 *
 * Copyright (C) 2020 Marvell.
 *
 */

#ifndef _OCTEP_RX_H_
#define _OCTEP_RX_H_

/* struct octep_oq_desc_hw - Octeon Hardware OQ descriptor format.
 *
 * The descriptor ring is made of descriptors which have 2 64-bit values:
 *
 *   @buffer_ptr: DMA address of the skb->data
 *   @info_ptr:  DMA address of host memory, used to update pkt count by hw.
 *               This is currently unused to save pci writes.
 */
struct octep_oq_desc_hw {};

static_assert();

#define OCTEP_OQ_DESC_SIZE

/* Rx offload flags */
#define OCTEP_RX_OFFLOAD_VLAN_STRIP
#define OCTEP_RX_OFFLOAD_IPV4_CKSUM
#define OCTEP_RX_OFFLOAD_UDP_CKSUM
#define OCTEP_RX_OFFLOAD_TCP_CKSUM

#define OCTEP_RX_OFFLOAD_CKSUM

#define OCTEP_RX_IP_CSUM(flags)

/* bit 0 is vlan strip */
#define OCTEP_RX_CSUM_IP_VERIFIED
#define OCTEP_RX_CSUM_L4_VERIFIED

#define OCTEP_RX_CSUM_VERIFIED(flags)

/* Extended Response Header in packet data received from Hardware.
 * Includes metadata like checksum status.
 * this is valid only if hardware/firmware published support for this.
 * This is at offset 0 of packet data (skb->data).
 */
struct octep_oq_resp_hw_ext {};

static_assert();

#define OCTEP_OQ_RESP_HW_EXT_SIZE

/* Length of Rx packet DMA'ed by Octeon to Host.
 * this is in bigendian; so need to be converted to cpu endian.
 * Octeon writes this at the beginning of Rx buffer (skb->data).
 */
struct octep_oq_resp_hw {};

static_assert();

#define OCTEP_OQ_RESP_HW_SIZE

/* Pointer to data buffer.
 * Driver keeps a pointer to the data buffer that it made available to
 * the Octeon device. Since the descriptor ring keeps physical (bus)
 * addresses, this field is required for the driver to keep track of
 * the virtual address pointers. The fields are operated by
 * OS-dependent routines.
 */
struct octep_rx_buffer {};

#define OCTEP_OQ_RECVBUF_SIZE

/* Output Queue statistics. Each output queue has four stats fields. */
struct octep_oq_stats {};

#define OCTEP_OQ_STATS_SIZE

/* Hardware interface Rx statistics */
struct octep_iface_rx_stats {};

/* The Descriptor Ring Output Queue structure.
 * This structure has all the information required to implement a
 * Octeon OQ.
 */
struct octep_oq {};

#define OCTEP_OQ_SIZE
#endif	/* _OCTEP_RX_H_ */