linux/drivers/net/ethernet/marvell/octeontx2/af/rvu_reg.h

/* SPDX-License-Identifier: GPL-2.0 */
/* Marvell RVU Admin Function driver
 *
 * Copyright (C) 2018 Marvell.
 *
 */

#ifndef RVU_REG_H
#define RVU_REG_H

/* Admin function registers */
#define RVU_AF_MSIXTR_BASE
#define RVU_AF_ECO
#define RVU_AF_BLK_RST
#define RVU_AF_PF_BAR4_ADDR
#define RVU_AF_RAS
#define RVU_AF_RAS_W1S
#define RVU_AF_RAS_ENA_W1S
#define RVU_AF_RAS_ENA_W1C
#define RVU_AF_GEN_INT
#define RVU_AF_GEN_INT_W1S
#define RVU_AF_GEN_INT_ENA_W1S
#define RVU_AF_GEN_INT_ENA_W1C
#define RVU_AF_AFPF_MBOX0
#define RVU_AF_AFPF_MBOX1
#define RVU_AF_AFPFX_MBOXX(a, b)
#define RVU_AF_PFME_STATUS
#define RVU_AF_PFTRPEND
#define RVU_AF_PFTRPEND_W1S
#define RVU_AF_PF_RST
#define RVU_AF_HWVF_RST
#define RVU_AF_PFAF_MBOX_INT
#define RVU_AF_PFAF_MBOX_INT_W1S
#define RVU_AF_PFAF_MBOX_INT_ENA_W1S
#define RVU_AF_PFAF_MBOX_INT_ENA_W1C
#define RVU_AF_PFFLR_INT
#define RVU_AF_PFFLR_INT_W1S
#define RVU_AF_PFFLR_INT_ENA_W1S
#define RVU_AF_PFFLR_INT_ENA_W1C
#define RVU_AF_PFME_INT
#define RVU_AF_PFME_INT_W1S
#define RVU_AF_PFME_INT_ENA_W1S
#define RVU_AF_PFME_INT_ENA_W1C
#define RVU_AF_PFX_BAR4_ADDR(a)
#define RVU_AF_PFX_BAR4_CFG
#define RVU_AF_PFX_VF_BAR4_ADDR
#define RVU_AF_PFX_VF_BAR4_CFG
#define RVU_AF_PFX_LMTLINE_ADDR
#define RVU_AF_SMMU_ADDR_REQ
#define RVU_AF_SMMU_TXN_REQ
#define RVU_AF_SMMU_ADDR_RSP_STS
#define RVU_AF_SMMU_ADDR_TLN
#define RVU_AF_SMMU_TLN_FLIT0

/* Admin function's privileged PF/VF registers */
#define RVU_PRIV_CONST
#define RVU_PRIV_GEN_CFG
#define RVU_PRIV_CLK_CFG
#define RVU_PRIV_ACTIVE_PC
#define RVU_PRIV_PFX_CFG(a)
#define RVU_PRIV_PFX_MSIX_CFG(a)
#define RVU_PRIV_PFX_ID_CFG(a)
#define RVU_PRIV_PFX_INT_CFG(a)
#define RVU_PRIV_PFX_NIXX_CFG(a)
#define RVU_PRIV_PFX_NPA_CFG
#define RVU_PRIV_PFX_SSO_CFG
#define RVU_PRIV_PFX_SSOW_CFG
#define RVU_PRIV_PFX_TIM_CFG
#define RVU_PRIV_PFX_CPTX_CFG(a)
#define RVU_PRIV_BLOCK_TYPEX_REV(a)
#define RVU_PRIV_HWVFX_INT_CFG(a)
#define RVU_PRIV_HWVFX_NIXX_CFG(a)
#define RVU_PRIV_HWVFX_NPA_CFG
#define RVU_PRIV_HWVFX_SSO_CFG
#define RVU_PRIV_HWVFX_SSOW_CFG
#define RVU_PRIV_HWVFX_TIM_CFG
#define RVU_PRIV_HWVFX_CPTX_CFG(a)

/* RVU PF registers */
#define RVU_PF_VFX_PFVF_MBOX0
#define RVU_PF_VFX_PFVF_MBOX1
#define RVU_PF_VFX_PFVF_MBOXX(a, b)
#define RVU_PF_VF_BAR4_ADDR
#define RVU_PF_BLOCK_ADDRX_DISC(a)
#define RVU_PF_VFME_STATUSX(a)
#define RVU_PF_VFTRPENDX(a)
#define RVU_PF_VFTRPEND_W1SX(a)
#define RVU_PF_VFPF_MBOX_INTX(a)
#define RVU_PF_VFPF_MBOX_INT_W1SX(a)
#define RVU_PF_VFPF_MBOX_INT_ENA_W1SX(a)
#define RVU_PF_VFPF_MBOX_INT_ENA_W1CX(a)
#define RVU_PF_VFFLR_INTX(a)
#define RVU_PF_VFFLR_INT_W1SX(a)
#define RVU_PF_VFFLR_INT_ENA_W1SX(a)
#define RVU_PF_VFFLR_INT_ENA_W1CX(a)
#define RVU_PF_VFME_INTX(a)
#define RVU_PF_VFME_INT_W1SX(a)
#define RVU_PF_VFME_INT_ENA_W1SX(a)
#define RVU_PF_VFME_INT_ENA_W1CX(a)
#define RVU_PF_PFAF_MBOX0
#define RVU_PF_PFAF_MBOX1
#define RVU_PF_PFAF_MBOXX(a)
#define RVU_PF_INT
#define RVU_PF_INT_W1S
#define RVU_PF_INT_ENA_W1S
#define RVU_PF_INT_ENA_W1C
#define RVU_PF_MSIX_VECX_ADDR(a)
#define RVU_PF_MSIX_VECX_CTL(a)
#define RVU_PF_MSIX_PBAX(a)
#define RVU_PF_VF_MBOX_ADDR
#define RVU_PF_LMTLINE_ADDR

/* RVU VF registers */
#define RVU_VF_VFPF_MBOX0
#define RVU_VF_VFPF_MBOX1

/* NPA block's admin function registers */
#define NPA_AF_BLK_RST
#define NPA_AF_CONST
#define NPA_AF_CONST1
#define NPA_AF_LF_RST
#define NPA_AF_GEN_CFG
#define NPA_AF_NDC_CFG
#define NPA_AF_NDC_SYNC
#define NPA_AF_INP_CTL
#define NPA_AF_ACTIVE_CYCLES_PC
#define NPA_AF_AVG_DELAY
#define NPA_AF_GEN_INT
#define NPA_AF_GEN_INT_W1S
#define NPA_AF_GEN_INT_ENA_W1S
#define NPA_AF_GEN_INT_ENA_W1C
#define NPA_AF_RVU_INT
#define NPA_AF_RVU_INT_W1S
#define NPA_AF_RVU_INT_ENA_W1S
#define NPA_AF_RVU_INT_ENA_W1C
#define NPA_AF_ERR_INT
#define NPA_AF_ERR_INT_W1S
#define NPA_AF_ERR_INT_ENA_W1S
#define NPA_AF_ERR_INT_ENA_W1C
#define NPA_AF_RAS
#define NPA_AF_RAS_W1S
#define NPA_AF_RAS_ENA_W1S
#define NPA_AF_RAS_ENA_W1C
#define NPA_AF_BP_TEST
#define NPA_AF_ECO
#define NPA_AF_AQ_CFG
#define NPA_AF_AQ_BASE
#define NPA_AF_AQ_STATUS
#define NPA_AF_AQ_DOOR
#define NPA_AF_AQ_DONE_WAIT
#define NPA_AF_AQ_DONE
#define NPA_AF_AQ_DONE_ACK
#define NPA_AF_AQ_DONE_INT
#define NPA_AF_AQ_DONE_INT_W1S
#define NPA_AF_AQ_DONE_ENA_W1S
#define NPA_AF_AQ_DONE_ENA_W1C
#define NPA_AF_BATCH_CTL
#define NPA_AF_LFX_AURAS_CFG(a)
#define NPA_AF_LFX_LOC_AURAS_BASE(a)
#define NPA_AF_LFX_QINTS_CFG(a)
#define NPA_AF_LFX_QINTS_BASE(a)
#define NPA_PRIV_AF_INT_CFG
#define NPA_PRIV_LFX_CFG
#define NPA_PRIV_LFX_INT_CFG
#define NPA_AF_RVU_LF_CFG_DEBUG

/* NIX block's admin function registers */
#define NIX_AF_CFG
#define NIX_AF_STATUS
#define NIX_AF_NDC_CFG
#define NIX_AF_CONST
#define NIX_AF_CONST1
#define NIX_AF_CONST2
#define NIX_AF_CONST3
#define NIX_AF_SQ_CONST
#define NIX_AF_CQ_CONST
#define NIX_AF_RQ_CONST
#define NIX_AF_PL_CONST
#define NIX_AF_PSE_CONST
#define NIX_AF_TL1_CONST
#define NIX_AF_TL2_CONST
#define NIX_AF_TL3_CONST
#define NIX_AF_TL4_CONST
#define NIX_AF_MDQ_CONST
#define NIX_AF_MC_MIRROR_CONST
#define NIX_AF_LSO_CFG
#define NIX_AF_BLK_RST
#define NIX_AF_TX_TSTMP_CFG
#define NIX_AF_PL_TS
#define NIX_AF_RX_CFG
#define NIX_AF_AVG_DELAY
#define NIX_AF_CINT_DELAY
#define NIX_AF_VWQE_TIMER
#define NIX_AF_RX_MCAST_BASE
#define NIX_AF_RX_MCAST_CFG
#define NIX_AF_RX_MCAST_BUF_BASE
#define NIX_AF_RX_MCAST_BUF_CFG
#define NIX_AF_RX_MIRROR_BUF_BASE
#define NIX_AF_RX_MIRROR_BUF_CFG
#define NIX_AF_LF_RST
#define NIX_AF_GEN_INT
#define NIX_AF_GEN_INT_W1S
#define NIX_AF_GEN_INT_ENA_W1S
#define NIX_AF_GEN_INT_ENA_W1C
#define NIX_AF_ERR_INT
#define NIX_AF_ERR_INT_W1S
#define NIX_AF_ERR_INT_ENA_W1S
#define NIX_AF_ERR_INT_ENA_W1C
#define NIX_AF_RAS
#define NIX_AF_RAS_W1S
#define NIX_AF_RAS_ENA_W1S
#define NIX_AF_RAS_ENA_W1C
#define NIX_AF_RVU_INT
#define NIX_AF_RVU_INT_W1S
#define NIX_AF_RVU_INT_ENA_W1S
#define NIX_AF_RVU_INT_ENA_W1C
#define NIX_AF_TCP_TIMER
#define NIX_AF_RX_DEF_ET(a)
#define NIX_AF_RX_DEF_OL2
#define NIX_AF_RX_DEF_OIP4
#define NIX_AF_RX_DEF_IIP4
#define NIX_AF_RX_DEF_VLAN0_PCP_DEI
#define NIX_AF_RX_DEF_OIP6
#define NIX_AF_RX_DEF_VLAN1_PCP_DEI
#define NIX_AF_RX_DEF_IIP6
#define NIX_AF_RX_DEF_OTCP
#define NIX_AF_RX_DEF_ITCP
#define NIX_AF_RX_DEF_OUDP
#define NIX_AF_RX_DEF_IUDP
#define NIX_AF_RX_DEF_OSCTP
#define NIX_AF_RX_DEF_CST_APAD0
#define NIX_AF_RX_DEF_ISCTP
#define NIX_AF_RX_DEF_IPSECX
#define NIX_AF_RX_DEF_CST_APAD1
#define NIX_AF_RX_DEF_IIP4_DSCP
#define NIX_AF_RX_DEF_OIP4_DSCP
#define NIX_AF_RX_DEF_IIP6_DSCP
#define NIX_AF_RX_DEF_OIP6_DSCP
#define NIX_AF_RX_IPSEC_GEN_CFG
#define NIX_AF_RX_CPTX_INST_ADDR
#define NIX_AF_RX_CPTX_INST_QSEL(a)
#define NIX_AF_RX_CPTX_CREDIT(a)
#define NIX_AF_NDC_RX_SYNC
#define NIX_AF_NDC_TX_SYNC
#define NIX_AF_AQ_CFG
#define NIX_AF_AQ_BASE
#define NIX_AF_AQ_STATUS
#define NIX_AF_AQ_DOOR
#define NIX_AF_AQ_DONE_WAIT
#define NIX_AF_AQ_DONE
#define NIX_AF_AQ_DONE_ACK
#define NIX_AF_AQ_DONE_TIMER
#define NIX_AF_AQ_DONE_INT
#define NIX_AF_AQ_DONE_INT_W1S
#define NIX_AF_AQ_DONE_ENA_W1S
#define NIX_AF_AQ_DONE_ENA_W1C
#define NIX_AF_RX_LINKX_SLX_SPKT_CNT
#define NIX_AF_RX_LINKX_SLX_SXQE_CNT
#define NIX_AF_RX_MCAST_JOBSX_SW_CNT
#define NIX_AF_RX_MIRROR_JOBSX_SW_CNT
#define NIX_AF_RX_LINKX_CFG(a)
#define NIX_AF_RX_SW_SYNC
#define NIX_AF_RX_SW_SYNC_DONE
#define NIX_AF_SEB_ECO
#define NIX_AF_SEB_TEST_BP
#define NIX_AF_NORM_TX_FIFO_STATUS
#define NIX_AF_EXPR_TX_FIFO_STATUS
#define NIX_AF_SDP_TX_FIFO_STATUS
#define NIX_AF_TX_NPC_CAPTURE_CONFIG
#define NIX_AF_TX_NPC_CAPTURE_INFO
#define NIX_AF_SEB_CFG
#define NIX_PTP_1STEP_EN

#define NIX_AF_DEBUG_NPC_RESP_DATAX(a)
#define NIX_AF_SMQX_CFG(a)
#define NIX_AF_SQM_DBG_CTL_STATUS
#define NIX_AF_DWRR_SDP_MTU
#define NIX_AF_DWRR_MTUX(a)
#define NIX_AF_DWRR_RPM_MTU
#define NIX_AF_PSE_CHANNEL_LEVEL
#define NIX_AF_PSE_SHAPER_CFG
#define NIX_AF_TX_EXPR_CREDIT
#define NIX_AF_MARK_FORMATX_CTL(a)
#define NIX_AF_TX_LINKX_NORM_CREDIT(a)
#define NIX_AF_TX_LINKX_EXPR_CREDIT(a)
#define NIX_AF_TX_LINKX_SW_XOFF(a)
#define NIX_AF_TX_LINKX_HW_XOFF(a)
#define NIX_AF_SDP_LINK_CREDIT
#define NIX_AF_SDP_SW_XOFFX(a)
#define NIX_AF_SDP_HW_XOFFX(a)
#define NIX_AF_TL4X_BP_STATUS(a)
#define NIX_AF_TL4X_SDP_LINK_CFG(a)
#define NIX_AF_TL1X_SCHEDULE(a)
#define NIX_AF_TL1X_SHAPE(a)
#define NIX_AF_TL1X_CIR(a)
#define NIX_AF_TL1X_SHAPE_STATE(a)
#define NIX_AF_TL1X_SW_XOFF(a)
#define NIX_AF_TL1X_TOPOLOGY(a)
#define NIX_AF_TL1X_GREEN(a)
#define NIX_AF_TL1X_YELLOW(a)
#define NIX_AF_TL1X_RED(a)
#define NIX_AF_TL1X_MD_DEBUG0(a)
#define NIX_AF_TL1X_MD_DEBUG1(a)
#define NIX_AF_TL1X_MD_DEBUG2(a)
#define NIX_AF_TL1X_MD_DEBUG3(a)
#define NIX_AF_TL1A_DEBUG
#define NIX_AF_TL1B_DEBUG
#define NIX_AF_TL1_DEBUG_GREEN
#define NIX_AF_TL1_DEBUG_NODE
#define NIX_AF_TL1X_DROPPED_PACKETS(a)
#define NIX_AF_TL1X_DROPPED_BYTES(a)
#define NIX_AF_TL1X_RED_PACKETS(a)
#define NIX_AF_TL1X_RED_BYTES(a)
#define NIX_AF_TL1X_YELLOW_PACKETS(a)
#define NIX_AF_TL1X_YELLOW_BYTES(a)
#define NIX_AF_TL1X_GREEN_PACKETS(a)
#define NIX_AF_TL1X_GREEN_BYTES(a)
#define NIX_AF_TL2X_SCHEDULE(a)
#define NIX_AF_TL2X_SHAPE(a)
#define NIX_AF_TL2X_CIR(a)
#define NIX_AF_TL2X_PIR(a)
#define NIX_AF_TL2X_SCHED_STATE(a)
#define NIX_AF_TL2X_SHAPE_STATE(a)
#define NIX_AF_TL2X_POINTERS(a)
#define NIX_AF_TL2X_SW_XOFF(a)
#define NIX_AF_TL2X_TOPOLOGY(a)
#define NIX_AF_TL2X_PARENT(a)
#define NIX_AF_TL2X_GREEN(a)
#define NIX_AF_TL2X_YELLOW(a)
#define NIX_AF_TL2X_RED(a)
#define NIX_AF_TL2X_MD_DEBUG0(a)
#define NIX_AF_TL2X_MD_DEBUG1(a)
#define NIX_AF_TL2X_MD_DEBUG2(a)
#define NIX_AF_TL2X_MD_DEBUG3(a)
#define NIX_AF_TL2A_DEBUG
#define NIX_AF_TL2B_DEBUG
#define NIX_AF_TL3X_SCHEDULE(a)
#define NIX_AF_TL3X_SHAPE(a)
#define NIX_AF_TL3X_CIR(a)
#define NIX_AF_TL3X_PIR(a)
#define NIX_AF_TL3X_SCHED_STATE(a)
#define NIX_AF_TL3X_SHAPE_STATE(a)
#define NIX_AF_TL3X_POINTERS(a)
#define NIX_AF_TL3X_SW_XOFF(a)
#define NIX_AF_TL3X_TOPOLOGY(a)
#define NIX_AF_TL3X_PARENT(a)
#define NIX_AF_TL3X_GREEN(a)
#define NIX_AF_TL3X_YELLOW(a)
#define NIX_AF_TL3X_RED(a)
#define NIX_AF_TL3X_MD_DEBUG0(a)
#define NIX_AF_TL3X_MD_DEBUG1(a)
#define NIX_AF_TL3X_MD_DEBUG2(a)
#define NIX_AF_TL3X_MD_DEBUG3(a)
#define NIX_AF_TL3A_DEBUG
#define NIX_AF_TL3B_DEBUG
#define NIX_AF_TL4X_SCHEDULE(a)
#define NIX_AF_TL4X_SHAPE(a)
#define NIX_AF_TL4X_CIR(a)
#define NIX_AF_TL4X_PIR(a)
#define NIX_AF_TL4X_SCHED_STATE(a)
#define NIX_AF_TL4X_SHAPE_STATE(a)
#define NIX_AF_TL4X_POINTERS(a)
#define NIX_AF_TL4X_SW_XOFF(a)
#define NIX_AF_TL4X_TOPOLOGY(a)
#define NIX_AF_TL4X_PARENT(a)
#define NIX_AF_TL4X_GREEN(a)
#define NIX_AF_TL4X_YELLOW(a)
#define NIX_AF_TL4X_RED(a)
#define NIX_AF_TL4X_MD_DEBUG0(a)
#define NIX_AF_TL4X_MD_DEBUG1(a)
#define NIX_AF_TL4X_MD_DEBUG2(a)
#define NIX_AF_TL4X_MD_DEBUG3(a)
#define NIX_AF_TL4A_DEBUG
#define NIX_AF_TL4B_DEBUG
#define NIX_AF_MDQX_SCHEDULE(a)
#define NIX_AF_MDQX_SHAPE(a)
#define NIX_AF_MDQX_CIR(a)
#define NIX_AF_MDQX_PIR(a)
#define NIX_AF_MDQX_SCHED_STATE(a)
#define NIX_AF_MDQX_SHAPE_STATE(a)
#define NIX_AF_MDQX_POINTERS(a)
#define NIX_AF_MDQX_SW_XOFF(a)
#define NIX_AF_MDQX_PARENT(a)
#define NIX_AF_MDQX_MD_DEBUG(a)
#define NIX_AF_MDQX_PTR_FIFO(a)
#define NIX_AF_MDQA_DEBUG
#define NIX_AF_MDQB_DEBUG
#define NIX_AF_TL3_TL2X_CFG(a)
#define NIX_AF_TL3_TL2X_BP_STATUS(a)
#define NIX_AF_TL3_TL2X_LINKX_CFG(a, b)
#define NIX_AF_RX_FLOW_KEY_ALGX_FIELDX(a, b)
#define NIX_AF_TX_MCASTX(a)
#define NIX_AF_TX_VTAG_DEFX_CTL(a)
#define NIX_AF_TX_VTAG_DEFX_DATA(a)
#define NIX_AF_RX_BPIDX_STATUS(a)
#define NIX_AF_RX_CHANX_CFG(a)
#define NIX_AF_CINT_TIMERX(a)
#define NIX_AF_LSO_FORMATX_FIELDX(a, b)
#define NIX_AF_LFX_CFG(a)
#define NIX_AF_LFX_SQS_CFG(a)
#define NIX_AF_LFX_TX_CFG2(a)
#define NIX_AF_LFX_SQS_BASE(a)
#define NIX_AF_LFX_RQS_CFG(a)
#define NIX_AF_LFX_RQS_BASE(a)
#define NIX_AF_LFX_CQS_CFG(a)
#define NIX_AF_LFX_CQS_BASE(a)
#define NIX_AF_LFX_TX_CFG(a)
#define NIX_AF_LFX_TX_PARSE_CFG(a)
#define NIX_AF_LFX_RX_CFG(a)
#define NIX_AF_LFX_RSS_CFG(a)
#define NIX_AF_LFX_RSS_BASE(a)
#define NIX_AF_LFX_QINTS_CFG(a)
#define NIX_AF_LFX_QINTS_BASE(a)
#define NIX_AF_LFX_CINTS_CFG(a)
#define NIX_AF_LFX_CINTS_BASE(a)
#define NIX_AF_LFX_RX_IPSEC_CFG0(a)
#define NIX_AF_LFX_RX_IPSEC_CFG1(a)
#define NIX_AF_LFX_RX_IPSEC_DYNO_CFG(a)
#define NIX_AF_LFX_RX_IPSEC_DYNO_BASE(a)
#define NIX_AF_LFX_RX_IPSEC_SA_BASE(a)
#define NIX_AF_LFX_TX_STATUS(a)
#define NIX_AF_LFX_RX_VTAG_TYPEX(a, b)
#define NIX_AF_LFX_LOCKX(a, b)
#define NIX_AF_LFX_TX_STATX(a, b)
#define NIX_AF_LFX_RX_STATX(a, b)
#define NIX_AF_LFX_RSS_GRPX(a, b)
#define NIX_AF_RX_NPC_MC_RCV
#define NIX_AF_RX_NPC_MC_DROP
#define NIX_AF_RX_NPC_MIRROR_RCV
#define NIX_AF_RX_NPC_MIRROR_DROP
#define NIX_AF_RX_ACTIVE_CYCLES_PCX(a)
#define NIX_AF_LINKX_CFG(a)
#define NIX_AF_MDQX_IN_MD_COUNT(a)
#define NIX_AF_SMQX_STATUS(a)
#define NIX_AF_MDQX_OUT_MD_COUNT(a)

#define NIX_PRIV_AF_INT_CFG
#define NIX_PRIV_LFX_CFG
#define NIX_PRIV_LFX_INT_CFG
#define NIX_AF_RVU_LF_CFG_DEBUG

#define NIX_AF_LINKX_BASE_MASK
#define NIX_AF_LINKX_RANGE_MASK
#define NIX_AF_LINKX_MCS_CNT_MASK

#define NIX_CONST_MAX_BPIDS
#define NIX_CONST_SDP_CHANS

#define NIX_AF_MDQ_PARENT_MASK
#define NIX_AF_TL4_PARENT_MASK
#define NIX_AF_TL3_PARENT_MASK
#define NIX_AF_TL2_PARENT_MASK

/* SSO */
#define SSO_AF_CONST
#define SSO_AF_CONST1
#define SSO_AF_BLK_RST
#define SSO_AF_LF_HWGRP_RST
#define SSO_AF_RVU_LF_CFG_DEBUG
#define SSO_PRIV_LFX_HWGRP_CFG
#define SSO_PRIV_LFX_HWGRP_INT_CFG

/* SSOW */
#define SSOW_AF_RVU_LF_HWS_CFG_DEBUG
#define SSOW_AF_LF_HWS_RST
#define SSOW_PRIV_LFX_HWS_CFG
#define SSOW_PRIV_LFX_HWS_INT_CFG

/* TIM */
#define TIM_AF_CONST
#define TIM_PRIV_LFX_CFG
#define TIM_PRIV_LFX_INT_CFG
#define TIM_AF_RVU_LF_CFG_DEBUG
#define TIM_AF_BLK_RST
#define TIM_AF_LF_RST

/* CPT */
#define CPT_AF_CONSTANTS0
#define CPT_AF_CONSTANTS1
#define CPT_AF_DIAG
#define CPT_AF_ECO
#define CPT_AF_FLTX_INT(a)
#define CPT_AF_FLTX_INT_W1S(a)
#define CPT_AF_FLTX_INT_ENA_W1C(a)
#define CPT_AF_FLTX_INT_ENA_W1S(a)
#define CPT_AF_PSNX_EXE(a)
#define CPT_AF_PSNX_EXE_W1S(a)
#define CPT_AF_PSNX_LF(a)
#define CPT_AF_PSNX_LF_W1S(a)
#define CPT_AF_EXEX_CTL2(a)
#define CPT_AF_EXEX_STS(a)
#define CPT_AF_EXE_ERR_INFO
#define CPT_AF_EXEX_ACTIVE(a)
#define CPT_AF_INST_REQ_PC
#define CPT_AF_INST_LATENCY_PC
#define CPT_AF_RD_REQ_PC
#define CPT_AF_RD_LATENCY_PC
#define CPT_AF_RD_UC_PC
#define CPT_AF_ACTIVE_CYCLES_PC
#define CPT_AF_EXE_DBG_CTL
#define CPT_AF_EXE_DBG_DATA
#define CPT_AF_EXE_REQ_TIMER
#define CPT_AF_EXEX_CTL(a)
#define CPT_AF_EXE_PERF_CTL
#define CPT_AF_EXE_DBG_CNTX(a)
#define CPT_AF_EXE_PERF_EVENT_CNT
#define CPT_AF_EXE_EPCI_INBX_CNT(a)
#define CPT_AF_EXE_EPCI_OUTBX_CNT(a)
#define CPT_AF_EXEX_UCODE_BASE(a)
#define CPT_AF_LFX_CTL(a)
#define CPT_AF_LFX_CTL2(a)
#define CPT_AF_CPTCLK_CNT
#define CPT_AF_PF_FUNC
#define CPT_AF_LFX_PTR_CTL(a)
#define CPT_AF_GRPX_THR(a)
#define CPT_AF_CTL
#define CPT_AF_XEX_THR(a)
#define CPT_PRIV_LFX_CFG
#define CPT_PRIV_AF_INT_CFG
#define CPT_PRIV_LFX_INT_CFG
#define CPT_AF_LF_RST
#define CPT_AF_RVU_LF_CFG_DEBUG
#define CPT_AF_BLK_RST
#define CPT_AF_RVU_INT
#define CPT_AF_RVU_INT_W1S
#define CPT_AF_RVU_INT_ENA_W1S
#define CPT_AF_RVU_INT_ENA_W1C
#define CPT_AF_RAS_INT
#define CPT_AF_RAS_INT_W1S
#define CPT_AF_RAS_INT_ENA_W1S
#define CPT_AF_RAS_INT_ENA_W1C
#define CPT_AF_CTX_FLUSH_TIMER
#define CPT_AF_CTX_ERR
#define CPT_AF_CTX_ENC_ID
#define CPT_AF_CTX_MIS_PC
#define CPT_AF_CTX_HIT_PC
#define CPT_AF_CTX_AOP_PC
#define CPT_AF_CTX_AOP_LATENCY_PC
#define CPT_AF_CTX_IFETCH_PC
#define CPT_AF_CTX_IFETCH_LATENCY_PC
#define CPT_AF_CTX_FFETCH_PC
#define CPT_AF_CTX_FFETCH_LATENCY_PC
#define CPT_AF_CTX_WBACK_PC
#define CPT_AF_CTX_WBACK_LATENCY_PC
#define CPT_AF_CTX_PSH_PC
#define CPT_AF_CTX_PSH_LATENCY_PC
#define CPT_AF_CTX_CAM_DATA(a)
#define CPT_AF_RXC_TIME
#define CPT_AF_RXC_TIME_CFG
#define CPT_AF_RXC_DFRG
#define CPT_AF_RXC_ACTIVE_STS
#define CPT_AF_RXC_ZOMBIE_STS
#define CPT_AF_X2PX_LINK_CFG(a)

#define AF_BAR2_ALIASX(a, b)
#define CPT_AF_BAR2_SEL
#define CPT_AF_BAR2_ALIASX(a, b)

#define CPT_AF_LF_CTL2_SHIFT
#define CPT_AF_LF_SSO_PF_FUNC_SHIFT

#define CPT_LF_CTL
#define CPT_LF_INPROG
#define CPT_LF_Q_SIZE
#define CPT_LF_Q_INST_PTR
#define CPT_LF_Q_GRP_PTR
#define CPT_LF_CTX_FLUSH

#define NPC_AF_BLK_RST

/* NPC */
#define NPC_AF_CFG
#define NPC_AF_ACTIVE_PC
#define NPC_AF_CONST
#define NPC_AF_CONST1
#define NPC_AF_BLK_RST
#define NPC_AF_MCAM_SCRUB_CTL
#define NPC_AF_KCAM_SCRUB_CTL
#define NPC_AF_CONST2
#define NPC_AF_CONST3
#define NPC_AF_KPUX_CFG(a)
#define NPC_AF_PCK_CFG
#define NPC_AF_PCK_DEF_OL2
#define NPC_AF_PCK_DEF_OIP4
#define NPC_AF_PCK_DEF_OIP6
#define NPC_AF_PCK_DEF_IIP4
#define NPC_AF_INTFX_HASHX_RESULT_CTRL(a, b)
#define NPC_AF_INTFX_HASHX_MASKX(a, b, c)
#define NPC_AF_KEX_LDATAX_FLAGS_CFG(a)
#define NPC_AF_INTFX_HASHX_CFG(a, b)
#define NPC_AF_INTFX_SECRET_KEY0(a)
#define NPC_AF_INTFX_SECRET_KEY1(a)
#define NPC_AF_INTFX_SECRET_KEY2(a)
#define NPC_AF_INTFX_KEX_CFG(a)
#define NPC_AF_PKINDX_ACTION0(a)
#define NPC_AF_PKINDX_ACTION1(a)
#define NPC_AF_PKINDX_CPI_DEFX(a, b)
#define NPC_AF_KPUX_ENTRYX_CAMX(a, b, c)
#define NPC_AF_KPUX_ENTRYX_ACTION0(a, b)
#define NPC_AF_KPUX_ENTRYX_ACTION1(a, b)
#define NPC_AF_KPUX_ENTRY_DISX(a, b)
#define NPC_AF_CPIX_CFG(a)
#define NPC_AF_INTFX_LIDX_LTX_LDX_CFG(a, b, c, d)
#define NPC_AF_INTFX_LDATAX_FLAGSX_CFG(a, b, c)
#define NPC_AF_INTFX_MISS_STAT_ACT(a)
#define NPC_AF_INTFX_MISS_ACT(a)
#define NPC_AF_INTFX_MISS_TAG_ACT(a)
#define NPC_AF_MCAM_BANKX_HITX(a, b)
#define NPC_AF_LKUP_CTL
#define NPC_AF_LKUP_DATAX(a)
#define NPC_AF_LKUP_RESULTX(a)
#define NPC_AF_INTFX_STAT(a)
#define NPC_AF_DBG_CTL
#define NPC_AF_DBG_STATUS
#define NPC_AF_KPUX_DBG(a)
#define NPC_AF_IKPU_ERR_CTL
#define NPC_AF_KPUX_ERR_CTL(a)
#define NPC_AF_MCAM_DBG
#define NPC_AF_DBG_DATAX(a)
#define NPC_AF_DBG_RESULTX(a)

#define NPC_AF_EXACT_MEM_ENTRY(a, b)
#define NPC_AF_EXACT_CAM_ENTRY(a)
#define NPC_AF_INTFX_EXACT_MASK(a)
#define NPC_AF_INTFX_EXACT_RESULT_CTL(a)
#define NPC_AF_INTFX_EXACT_CFG(a)
#define NPC_AF_INTFX_EXACT_SECRET0(a)
#define NPC_AF_INTFX_EXACT_SECRET1(a)
#define NPC_AF_INTFX_EXACT_SECRET2(a)

#define NPC_AF_MCAMEX_BANKX_CAMX_INTF(a, b, c)

#define NPC_AF_MCAMEX_BANKX_CAMX_W0(a, b, c)

#define NPC_AF_MCAMEX_BANKX_CAMX_W1(a, b, c)

#define NPC_AF_MCAMEX_BANKX_CFG(a, b)

#define NPC_AF_MCAMEX_BANKX_ACTION(a, b)							   \

#define NPC_AF_MCAMEX_BANKX_TAG_ACT(a, b)							   \

#define NPC_AF_MCAMEX_BANKX_STAT_ACT(a, b)							   \

#define NPC_AF_MATCH_STATX(a)							   \

/* NDC */
#define NDC_AF_CONST
#define NDC_AF_CLK_EN
#define NDC_AF_CTL
#define NDC_AF_BANK_CTL
#define NDC_AF_BANK_CTL_DONE
#define NDC_AF_INTR
#define NDC_AF_INTR_W1S
#define NDC_AF_INTR_ENA_W1S
#define NDC_AF_INTR_ENA_W1C
#define NDC_AF_ACTIVE_PC
#define NDC_AF_CAMS_RD_INTERVAL
#define NDC_AF_BP_TEST_ENABLE
#define NDC_AF_BP_TEST(a)
#define NDC_AF_BLK_RST
#define NDC_PRIV_AF_INT_CFG
#define NDC_AF_HASHX(a)
#define NDC_AF_PORTX_RTX_RWX_REQ_PC(a, b, c)
#define NDC_AF_PORTX_RTX_RWX_OSTDN_PC(a, b, c)
#define NDC_AF_PORTX_RTX_RWX_LAT_PC(a, b, c)
#define NDC_AF_PORTX_RTX_CANT_ALLOC_PC(a, b)
#define NDC_AF_BANKX_HIT_PC(a)
#define NDC_AF_BANKX_MISS_PC(a)
#define NDC_AF_BANKX_LINEX_METADATA(a, b)

/* LBK */
#define LBK_CONST
#define LBK_LINK_CFG_P2X
#define LBK_LINK_CFG_X2P
#define LBK_CONST_CHANS
#define LBK_CONST_DST
#define LBK_CONST_SRC
#define LBK_CONST_BUF_SIZE
#define LBK_LINK_CFG_RANGE_MASK
#define LBK_LINK_CFG_ID_MASK
#define LBK_LINK_CFG_BASE_MASK

/* APR */
#define APR_AF_LMT_CFG
#define APR_AF_LMT_MAP_BASE
#define APR_AF_LMT_CTL
#define APR_LMT_MAP_ENT_DIS_SCH_CMP_SHIFT
#define APR_LMT_MAP_ENT_SCH_ENA_SHIFT
#define APR_LMT_MAP_ENT_DIS_LINE_PREF_SHIFT
#define LMTST_THROTTLE_MASK
#define LMTST_WR_PEND_MAX

#endif /* RVU_REG_H */