linux/drivers/net/ethernet/marvell/octeontx2/af/rvu_struct.h

/* SPDX-License-Identifier: GPL-2.0 */
/* Marvell RVU Admin Function driver
 *
 * Copyright (C) 2018 Marvell.
 *
 */

#ifndef RVU_STRUCT_H
#define RVU_STRUCT_H

/* RVU Block revision IDs */
#define RVU_BLK_RVUM_REVID

#define RVU_MULTI_BLK_VER

/* RVU Block Address Enumeration */
enum rvu_block_addr_e {};

/* RVU Block Type Enumeration */
enum rvu_block_type_e {};

/* RVU Admin function Interrupt Vector Enumeration */
enum rvu_af_int_vec_e {};

/* CPT Admin function Interrupt Vector Enumeration */
enum cpt_af_int_vec_e {};

enum cpt_10k_af_int_vec_e {};

/* NPA Admin function Interrupt Vector Enumeration */
enum npa_af_int_vec_e {};

/* NIX Admin function Interrupt Vector Enumeration */
enum nix_af_int_vec_e {};

/**
 * RVU PF Interrupt Vector Enumeration
 */
enum rvu_pf_int_vec_e {};

/* NPA admin queue completion enumeration */
enum npa_aq_comp {};

/* NPA admin queue context types */
enum npa_aq_ctype {};

/* NPA admin queue instruction opcodes */
enum npa_aq_instop {};

/* ALLOC/FREE input queues Enumeration from coprocessors */
enum npa_inpq {};

/* NPA admin queue instruction structure */
struct npa_aq_inst_s {};

/* NPA admin queue result structure */
struct npa_aq_res_s {};

struct npa_aura_s {};

struct npa_pool_s {};

/* NIX admin queue completion status */
enum nix_aq_comp {};

/* NIX admin queue context types */
enum nix_aq_ctype {};

/* NIX admin queue instruction opcodes */
enum nix_aq_instop {};

/* NIX admin queue instruction structure */
struct nix_aq_inst_s {};

/* NIX admin queue result structure */
struct nix_aq_res_s {};

/* NIX Completion queue context structure */
struct nix_cq_ctx_s {};

/* CN10K NIX Receive queue context structure */
struct nix_cn10k_rq_ctx_s {};

/* CN10K NIX Send queue context structure */
struct nix_cn10k_sq_ctx_s {};

/* NIX Receive queue context structure */
struct nix_rq_ctx_s {};

/* NIX sqe sizes */
enum nix_maxsqesz {};

/* NIX SQB caching type */
enum nix_stype {};

/* NIX Send queue context structure */
struct nix_sq_ctx_s {};

/* NIX Receive side scaling entry structure*/
struct nix_rsse_s {};

/* NIX receive multicast/mirror entry structure */
struct nix_rx_mce_s {};

enum nix_band_prof_layers {};

enum NIX_RX_BAND_PROF_ACTIONRESULT_E {};

enum nix_band_prof_pc_mode {};

/* NIX ingress policer bandwidth profile structure */
struct nix_bandprof_s {};

enum nix_lsoalg {};

enum nix_txlayer {};

struct nix_lso_format {};

struct nix_rx_flowkey_alg {};

/* NIX VTAG size */
enum nix_vtag_size {};

enum nix_tx_vtag_op {};

/* NIX RX VTAG actions */
#define VTAG_STRIP
#define VTAG_CAPTURE

#endif /* RVU_STRUCT_H */