linux/drivers/net/ethernet/marvell/octeontx2/af/rpm.h

/* SPDX-License-Identifier: GPL-2.0 */
/* Marvell CN10K RPM driver
 *
 * Copyright (C) 2020 Marvell.
 *
 */

#ifndef RPM_H
#define RPM_H

#include <linux/bits.h>

/* PCI device IDs */
#define PCI_DEVID_CN10K_RPM
#define PCI_SUBSYS_DEVID_CNF10KB_RPM
#define PCI_DEVID_CN10KB_RPM

/* Registers */
#define RPMX_CMRX_CFG
#define RPMX_RX_TS_PREPEND
#define RPMX_TX_PTP_1S_SUPPORT
#define RPMX_CMRX_RX_ID_MAP
#define RPMX_CMRX_SW_INT
#define RPMX_CMRX_SW_INT_W1S
#define RPMX_CMRX_SW_INT_ENA_W1S
#define RPMX_CMRX_LINK_CFG
#define RPMX_MTI_PCS100X_CONTROL1
#define RPMX_MTI_PCS_LBK
#define RPMX_MTI_LPCSX_CONTROL(id)

#define RPMX_CMRX_LINK_RANGE_MASK
#define RPMX_CMRX_LINK_BASE_MASK
#define RPMX_MTI_MAC100X_COMMAND_CONFIG
#define RPMX_MTI_MAC100X_COMMAND_CONFIG_RX_P_DISABLE
#define RPMX_MTI_MAC100X_COMMAND_CONFIG_TX_P_DISABLE
#define RPMX_MTI_MAC100X_COMMAND_CONFIG_PAUSE_IGNORE
#define RPMX_MTI_MAC100X_COMMAND_CONFIG_PFC_MODE
#define RPMX_MTI_MAC100X_CL01_PAUSE_QUANTA
#define RPMX_MTI_MAC100X_CL23_PAUSE_QUANTA
#define RPMX_MTI_MAC100X_CL45_PAUSE_QUANTA
#define RPMX_MTI_MAC100X_CL67_PAUSE_QUANTA
#define RPMX_MTI_MAC100X_CL01_QUANTA_THRESH
#define RPMX_MTI_MAC100X_CL23_QUANTA_THRESH
#define RPMX_MTI_MAC100X_CL45_QUANTA_THRESH
#define RPMX_MTI_MAC100X_CL67_QUANTA_THRESH
#define RPMX_MTI_MAC100X_CL89_PAUSE_QUANTA
#define RPMX_MTI_MAC100X_CL1011_PAUSE_QUANTA
#define RPMX_MTI_MAC100X_CL1213_PAUSE_QUANTA
#define RPMX_MTI_MAC100X_CL1415_PAUSE_QUANTA
#define RPMX_MTI_MAC100X_CL89_QUANTA_THRESH
#define RPMX_MTI_MAC100X_CL1011_QUANTA_THRESH
#define RPMX_MTI_MAC100X_CL1213_QUANTA_THRESH
#define RPMX_MTI_MAC100X_CL1415_QUANTA_THRESH
#define RPMX_CMR_RX_OVR_BP
#define RPMX_CMR_RX_OVR_BP_EN(x)
#define RPMX_CMR_RX_OVR_BP_BP(x)
#define RPMX_CMR_CHAN_MSK_OR
#define RPMX_MTI_STAT_RX_STAT_PAGES_COUNTERX
#define RPMX_MTI_STAT_TX_STAT_PAGES_COUNTERX
#define RPMX_MTI_STAT_DATA_HI_CDC

#define RPM_LMAC_FWI
#define RPM_TX_EN
#define RPM_RX_EN
#define RPMX_CMRX_PRT_CBFC_CTL
#define RPMX_CMRX_PRT_CBFC_CTL_LOGL_EN_RX_SHIFT
#define RPMX_CMRX_PRT_CBFC_CTL_PHYS_BP_SHIFT
#define RPMX_CMRX_PRT_CBFC_CTL_LOGL_EN_TX_SHIFT
#define RPM_PFC_CLASS_MASK
#define RPMX_MTI_MAC100X_CL89_QUANTA_THRESH
#define RPMX_MTI_MAC100X_COMMAND_CONFIG_TX_PAD_EN
#define RPMX_MTI_MAC100X_COMMAND_CONFIG_PAUSE_IGNORE
#define RPMX_MTI_MAC100X_COMMAND_CONFIG_PAUSE_FWD
#define RPMX_MTI_MAC100X_CL01_PAUSE_QUANTA
#define RPMX_MTI_MAC100X_CL89_PAUSE_QUANTA
#define RPM_DEFAULT_PAUSE_TIME
#define RPMX_CMRX_RX_LOGL_XON

#define RPMX_MTI_MAC100X_XIF_MODE
#define RPMX_ONESTEP_ENABLE
#define RPMX_TS_BINARY_MODE
#define RPMX_CONST1

/* FEC stats */
#define RPMX_MTI_STAT_STATN_CONTROL
#define RPMX_MTI_STAT_DATA_HI_CDC
#define RPMX_RSFEC_RX_CAPTURE
#define RPMX_CMD_CLEAR_RX
#define RPMX_CMD_CLEAR_TX
#define RPMX_MTI_RSFEC_STAT_COUNTER_CAPTURE_2
#define RPMX_MTI_RSFEC_STAT_COUNTER_CAPTURE_3
#define RPMX_MTI_FCFECX_VL0_CCW_LO
#define RPMX_MTI_FCFECX_VL0_NCCW_LO
#define RPMX_MTI_FCFECX_VL1_CCW_LO
#define RPMX_MTI_FCFECX_VL1_NCCW_LO
#define RPMX_MTI_FCFECX_CW_HI

/* CN10KB CSR Declaration */
#define RPM2_CMRX_SW_INT
#define RPM2_CMRX_SW_INT_ENA_W1S
#define RPM2_LMAC_FWI
#define RPM2_CMR_CHAN_MSK_OR
#define RPM2_CMR_RX_OVR_BP_EN
#define RPM2_CMR_RX_OVR_BP_BP
#define RPM2_CMR_RX_OVR_BP
#define RPM2_CSR_OFFSET
#define RPM2_CMRX_PRT_CBFC_CTL
#define RPM2_CMRX_RX_LMACS
#define RPM2_CMRX_RX_LOGL_XON
#define RPM2_CMRX_RX_STAT2
#define RPM2_USX_PCSX_CONTROL1
#define RPM2_USX_PCS_LBK

/* Function Declarations */
int rpm_get_nr_lmacs(void *rpmd);
u8 rpm_get_lmac_type(void *rpmd, int lmac_id);
u32 rpm_get_lmac_fifo_len(void *rpmd, int lmac_id);
u32 rpm2_get_lmac_fifo_len(void *rpmd, int lmac_id);
int rpm_lmac_internal_loopback(void *rpmd, int lmac_id, bool enable);
void rpm_lmac_enadis_rx_pause_fwding(void *rpmd, int lmac_id, bool enable);
int rpm_lmac_get_pause_frm_status(void *cgxd, int lmac_id, u8 *tx_pause,
				  u8 *rx_pause);
void rpm_lmac_pause_frm_config(void *rpmd, int lmac_id, bool enable);
int rpm_lmac_enadis_pause_frm(void *rpmd, int lmac_id, u8 tx_pause,
			      u8 rx_pause);
int rpm_get_tx_stats(void *rpmd, int lmac_id, int idx, u64 *tx_stat);
int rpm_get_rx_stats(void *rpmd, int lmac_id, int idx, u64 *rx_stat);
void rpm_lmac_ptp_config(void *rpmd, int lmac_id, bool enable);
int rpm_lmac_rx_tx_enable(void *rpmd, int lmac_id, bool enable);
int rpm_lmac_tx_enable(void *rpmd, int lmac_id, bool enable);
int rpm_lmac_pfc_config(void *rpmd, int lmac_id, u8 tx_pause, u8 rx_pause,
			u16 pfc_en);
int rpm_lmac_get_pfc_frm_cfg(void *rpmd, int lmac_id, u8 *tx_pause,
			     u8 *rx_pause);
int rpm2_get_nr_lmacs(void *rpmd);
bool is_dev_rpm2(void *rpmd);
int rpm_get_fec_stats(void *cgxd, int lmac_id, struct cgx_fec_stats_rsp *rsp);
int rpm_lmac_reset(void *rpmd, int lmac_id, u8 pf_req_flr);
int rpm_stats_reset(void *rpmd, int lmac_id);
#endif /* RPM_H */