linux/drivers/net/ethernet/marvell/octeontx2/af/rvu_cgx.c

// SPDX-License-Identifier: GPL-2.0
/* Marvell RVU Admin Function driver
 *
 * Copyright (C) 2018 Marvell.
 *
 */

#include <linux/types.h>
#include <linux/module.h>
#include <linux/pci.h>

#include "rvu.h"
#include "cgx.h"
#include "lmac_common.h"
#include "rvu_reg.h"
#include "rvu_trace.h"
#include "rvu_npc_hash.h"

struct cgx_evq_entry { … };

#define M …

MBOX_UP_CGX_MESSAGES
#undef M

bool is_mac_feature_supported(struct rvu *rvu, int pf, int feature)
{ … }

#define CGX_OFFSET(x) …
/* Returns bitmap of mapped PFs */
static u64 cgxlmac_to_pfmap(struct rvu *rvu, u8 cgx_id, u8 lmac_id)
{ … }

int cgxlmac_to_pf(struct rvu *rvu, int cgx_id, int lmac_id)
{ … }

static u8 cgxlmac_id_to_bmap(u8 cgx_id, u8 lmac_id)
{ … }

void *rvu_cgx_pdata(u8 cgx_id, struct rvu *rvu)
{ … }

/* Return first enabled CGX instance if none are enabled then return NULL */
void *rvu_first_cgx_pdata(struct rvu *rvu)
{ … }

/* Based on P2X connectivity find mapped NIX block for a PF */
static void rvu_map_cgx_nix_block(struct rvu *rvu, int pf,
				  int cgx_id, int lmac_id)
{ … }

static int rvu_map_cgx_lmac_pf(struct rvu *rvu)
{ … }

static int rvu_cgx_send_link_info(int cgx_id, int lmac_id, struct rvu *rvu)
{ … }

/* This is called from interrupt context and is expected to be atomic */
static int cgx_lmac_postevent(struct cgx_link_event *event, void *data)
{ … }

static void cgx_notify_pfs(struct cgx_link_event *event, struct rvu *rvu)
{ … }

static void cgx_evhandler_task(struct work_struct *work)
{ … }

static int cgx_lmac_event_handler_init(struct rvu *rvu)
{ … }

static void rvu_cgx_wq_destroy(struct rvu *rvu)
{ … }

int rvu_cgx_init(struct rvu *rvu)
{ … }

int rvu_cgx_exit(struct rvu *rvu)
{ … }

/* Most of the CGX configuration is restricted to the mapped PF only,
 * VF's of mapped PF and other PFs are not allowed. This fn() checks
 * whether a PFFUNC is permitted to do the config or not.
 */
inline bool is_cgx_config_permitted(struct rvu *rvu, u16 pcifunc)
{ … }

void rvu_cgx_enadis_rx_bp(struct rvu *rvu, int pf, bool enable)
{ … }

int rvu_cgx_config_rxtx(struct rvu *rvu, u16 pcifunc, bool start)
{ … }

int rvu_cgx_tx_enable(struct rvu *rvu, u16 pcifunc, bool enable)
{ … }

int rvu_cgx_config_tx(void *cgxd, int lmac_id, bool enable)
{ … }

void rvu_cgx_disable_dmac_entries(struct rvu *rvu, u16 pcifunc)
{ … }

int rvu_mbox_handler_cgx_start_rxtx(struct rvu *rvu, struct msg_req *req,
				    struct msg_rsp *rsp)
{ … }

int rvu_mbox_handler_cgx_stop_rxtx(struct rvu *rvu, struct msg_req *req,
				   struct msg_rsp *rsp)
{ … }

static int rvu_lmac_get_stats(struct rvu *rvu, struct msg_req *req,
			      void *rsp)
{ … }

int rvu_mbox_handler_cgx_stats(struct rvu *rvu, struct msg_req *req,
			       struct cgx_stats_rsp *rsp)
{ … }

int rvu_mbox_handler_rpm_stats(struct rvu *rvu, struct msg_req *req,
			       struct rpm_stats_rsp *rsp)
{ … }

int rvu_mbox_handler_cgx_stats_rst(struct rvu *rvu, struct msg_req *req,
				   struct msg_rsp *rsp)
{ … }

int rvu_mbox_handler_cgx_fec_stats(struct rvu *rvu,
				   struct msg_req *req,
				   struct cgx_fec_stats_rsp *rsp)
{ … }

int rvu_mbox_handler_cgx_mac_addr_set(struct rvu *rvu,
				      struct cgx_mac_addr_set_or_get *req,
				      struct cgx_mac_addr_set_or_get *rsp)
{ … }

int rvu_mbox_handler_cgx_mac_addr_add(struct rvu *rvu,
				      struct cgx_mac_addr_add_req *req,
				      struct cgx_mac_addr_add_rsp *rsp)
{ … }

int rvu_mbox_handler_cgx_mac_addr_del(struct rvu *rvu,
				      struct cgx_mac_addr_del_req *req,
				      struct msg_rsp *rsp)
{ … }

int rvu_mbox_handler_cgx_mac_max_entries_get(struct rvu *rvu,
					     struct msg_req *req,
					     struct cgx_max_dmac_entries_get_rsp
					     *rsp)
{ … }

int rvu_mbox_handler_cgx_mac_addr_get(struct rvu *rvu,
				      struct cgx_mac_addr_set_or_get *req,
				      struct cgx_mac_addr_set_or_get *rsp)
{ … }

int rvu_mbox_handler_cgx_promisc_enable(struct rvu *rvu, struct msg_req *req,
					struct msg_rsp *rsp)
{ … }

int rvu_mbox_handler_cgx_promisc_disable(struct rvu *rvu, struct msg_req *req,
					 struct msg_rsp *rsp)
{ … }

static int rvu_cgx_ptp_rx_cfg(struct rvu *rvu, u16 pcifunc, bool enable)
{ … }

int rvu_mbox_handler_cgx_ptp_rx_enable(struct rvu *rvu, struct msg_req *req,
				       struct msg_rsp *rsp)
{ … }

int rvu_mbox_handler_cgx_ptp_rx_disable(struct rvu *rvu, struct msg_req *req,
					struct msg_rsp *rsp)
{ … }

static int rvu_cgx_config_linkevents(struct rvu *rvu, u16 pcifunc, bool en)
{ … }

int rvu_mbox_handler_cgx_start_linkevents(struct rvu *rvu, struct msg_req *req,
					  struct msg_rsp *rsp)
{ … }

int rvu_mbox_handler_cgx_stop_linkevents(struct rvu *rvu, struct msg_req *req,
					 struct msg_rsp *rsp)
{ … }

int rvu_mbox_handler_cgx_get_linkinfo(struct rvu *rvu, struct msg_req *req,
				      struct cgx_link_info_msg *rsp)
{ … }

int rvu_mbox_handler_cgx_features_get(struct rvu *rvu,
				      struct msg_req *req,
				      struct cgx_features_info_msg *rsp)
{ … }

u32 rvu_cgx_get_fifolen(struct rvu *rvu)
{ … }

u32 rvu_cgx_get_lmac_fifolen(struct rvu *rvu, int cgx, int lmac)
{ … }

static int rvu_cgx_config_intlbk(struct rvu *rvu, u16 pcifunc, bool en)
{ … }

int rvu_mbox_handler_cgx_intlbk_enable(struct rvu *rvu, struct msg_req *req,
				       struct msg_rsp *rsp)
{ … }

int rvu_mbox_handler_cgx_intlbk_disable(struct rvu *rvu, struct msg_req *req,
					struct msg_rsp *rsp)
{ … }

int rvu_cgx_cfg_pause_frm(struct rvu *rvu, u16 pcifunc, u8 tx_pause, u8 rx_pause)
{ … }

int rvu_mbox_handler_cgx_cfg_pause_frm(struct rvu *rvu,
				       struct cgx_pause_frm_cfg *req,
				       struct cgx_pause_frm_cfg *rsp)
{ … }

int rvu_mbox_handler_cgx_get_phy_fec_stats(struct rvu *rvu, struct msg_req *req,
					   struct msg_rsp *rsp)
{ … }

/* Finds cumulative status of NIX rx/tx counters from LF of a PF and those
 * from its VFs as well. ie. NIX rx/tx counters at the CGX port level
 */
int rvu_cgx_nix_cuml_stats(struct rvu *rvu, void *cgxd, int lmac_id,
			   int index, int rxtxflag, u64 *stat)
{ … }

int rvu_cgx_start_stop_io(struct rvu *rvu, u16 pcifunc, bool start)
{ … }

int rvu_mbox_handler_cgx_set_fec_param(struct rvu *rvu,
				       struct fec_mode *req,
				       struct fec_mode *rsp)
{ … }

int rvu_mbox_handler_cgx_get_aux_link_info(struct rvu *rvu, struct msg_req *req,
					   struct cgx_fw_data *rsp)
{ … }

int rvu_mbox_handler_cgx_set_link_mode(struct rvu *rvu,
				       struct cgx_set_link_mode_req *req,
				       struct cgx_set_link_mode_rsp *rsp)
{ … }

int rvu_mbox_handler_cgx_mac_addr_reset(struct rvu *rvu, struct cgx_mac_addr_reset_req *req,
					struct msg_rsp *rsp)
{ … }

int rvu_mbox_handler_cgx_mac_addr_update(struct rvu *rvu,
					 struct cgx_mac_addr_update_req *req,
					 struct cgx_mac_addr_update_rsp *rsp)
{ … }

int rvu_cgx_prio_flow_ctrl_cfg(struct rvu *rvu, u16 pcifunc, u8 tx_pause,
			       u8 rx_pause, u16 pfc_en)
{ … }

int rvu_mbox_handler_cgx_prio_flow_ctrl_cfg(struct rvu *rvu,
					    struct cgx_pfc_cfg *req,
					    struct cgx_pfc_rsp *rsp)
{ … }

void rvu_mac_reset(struct rvu *rvu, u16 pcifunc)
{ … }