linux/drivers/net/ethernet/marvell/octeontx2/af/rvu_cn10k.c

// SPDX-License-Identifier: GPL-2.0
/* Marvell RPM CN10K driver
 *
 * Copyright (C) 2020 Marvell.
 */

#include <linux/bitfield.h>
#include <linux/pci.h>
#include "rvu.h"
#include "cgx.h"
#include "rvu_reg.h"

/* RVU LMTST */
#define LMT_TBL_OP_READ …
#define LMT_TBL_OP_WRITE …
#define LMT_MAP_TABLE_SIZE …
#define LMT_MAPTBL_ENTRY_SIZE …

/* Function to perform operations (read/write) on lmtst map table */
static int lmtst_map_table_ops(struct rvu *rvu, u32 index, u64 *val,
			       int lmt_tbl_op)
{ … }

#define LMT_MAP_TBL_W1_OFF …
static u32 rvu_get_lmtst_tbl_index(struct rvu *rvu, u16 pcifunc)
{ … }

static int rvu_get_lmtaddr(struct rvu *rvu, u16 pcifunc,
			   u64 iova, u64 *lmt_addr)
{ … }

static int rvu_update_lmtaddr(struct rvu *rvu, u16 pcifunc, u64 lmt_addr)
{ … }

int rvu_mbox_handler_lmtst_tbl_setup(struct rvu *rvu,
				     struct lmtst_tbl_setup_req *req,
				     struct msg_rsp *rsp)
{ … }

/* Resetting the lmtst map table to original base addresses */
void rvu_reset_lmt_map_tbl(struct rvu *rvu, u16 pcifunc)
{ … }

int rvu_set_channels_base(struct rvu *rvu)
{ … }

#define LBK_CONNECT_NIXX(a) …

static void __rvu_lbk_set_chans(struct rvu *rvu, void __iomem *base,
				u64 offset, int lbkid, u16 chans)
{ … }

static void rvu_lbk_set_channels(struct rvu *rvu)
{ … }

static void __rvu_nix_set_channels(struct rvu *rvu, int blkaddr)
{ … }

static void rvu_nix_set_channels(struct rvu *rvu)
{ … }

static void __rvu_rpm_set_channels(int cgxid, int lmacid, u16 base)
{ … }

static void rvu_rpm_set_channels(struct rvu *rvu)
{ … }

void rvu_program_channels(struct rvu *rvu)
{ … }

void rvu_nix_block_cn10k_init(struct rvu *rvu, struct nix_hw *nix_hw)
{ … }

void rvu_apr_block_cn10k_init(struct rvu *rvu)
{ … }