linux/drivers/net/ethernet/marvell/octeontx2/nic/otx2_reg.h

/* SPDX-License-Identifier: GPL-2.0 */
/* Marvell RVU Ethernet driver
 *
 * Copyright (C) 2020 Marvell.
 *
 */

#ifndef OTX2_REG_H
#define OTX2_REG_H

#include <rvu_struct.h>

/* RVU PF registers */
#define RVU_PF_VFX_PFVF_MBOX0
#define RVU_PF_VFX_PFVF_MBOX1
#define RVU_PF_VFX_PFVF_MBOXX(a, b)
#define RVU_PF_VF_BAR4_ADDR
#define RVU_PF_BLOCK_ADDRX_DISC(a)
#define RVU_PF_VFME_STATUSX(a)
#define RVU_PF_VFTRPENDX(a)
#define RVU_PF_VFTRPEND_W1SX(a)
#define RVU_PF_VFPF_MBOX_INTX(a)
#define RVU_PF_VFPF_MBOX_INT_W1SX(a)
#define RVU_PF_VFPF_MBOX_INT_ENA_W1SX(a)
#define RVU_PF_VFPF_MBOX_INT_ENA_W1CX(a)
#define RVU_PF_VFFLR_INTX(a)
#define RVU_PF_VFFLR_INT_W1SX(a)
#define RVU_PF_VFFLR_INT_ENA_W1SX(a)
#define RVU_PF_VFFLR_INT_ENA_W1CX(a)
#define RVU_PF_VFME_INTX(a)
#define RVU_PF_VFME_INT_W1SX(a)
#define RVU_PF_VFME_INT_ENA_W1SX(a)
#define RVU_PF_VFME_INT_ENA_W1CX(a)
#define RVU_PF_PFAF_MBOX0
#define RVU_PF_PFAF_MBOX1
#define RVU_PF_PFAF_MBOXX(a)
#define RVU_PF_INT
#define RVU_PF_INT_W1S
#define RVU_PF_INT_ENA_W1S
#define RVU_PF_INT_ENA_W1C
#define RVU_PF_MSIX_VECX_ADDR(a)
#define RVU_PF_MSIX_VECX_CTL(a)
#define RVU_PF_MSIX_PBAX(a)
#define RVU_PF_VF_MBOX_ADDR
#define RVU_PF_LMTLINE_ADDR

/* RVU VF registers */
#define RVU_VF_VFPF_MBOX0
#define RVU_VF_VFPF_MBOX1
#define RVU_VF_VFPF_MBOXX(a)
#define RVU_VF_INT
#define RVU_VF_INT_W1S
#define RVU_VF_INT_ENA_W1S
#define RVU_VF_INT_ENA_W1C
#define RVU_VF_BLOCK_ADDRX_DISC(a)
#define RVU_VF_MSIX_VECX_ADDR(a)
#define RVU_VF_MSIX_VECX_CTL(a)
#define RVU_VF_MSIX_PBAX(a)
#define RVU_VF_MBOX_REGION

#define RVU_FUNC_BLKADDR_SHIFT
#define RVU_FUNC_BLKADDR_MASK

/* NPA LF registers */
#define NPA_LFBASE
#define NPA_LF_AURA_OP_ALLOCX(a)
#define NPA_LF_AURA_OP_FREE0
#define NPA_LF_AURA_OP_FREE1
#define NPA_LF_AURA_OP_CNT
#define NPA_LF_AURA_OP_LIMIT
#define NPA_LF_AURA_OP_INT
#define NPA_LF_AURA_OP_THRESH
#define NPA_LF_POOL_OP_PC
#define NPA_LF_POOL_OP_AVAILABLE
#define NPA_LF_POOL_OP_PTR_START0
#define NPA_LF_POOL_OP_PTR_START1
#define NPA_LF_POOL_OP_PTR_END0
#define NPA_LF_POOL_OP_PTR_END1
#define NPA_LF_POOL_OP_INT
#define NPA_LF_POOL_OP_THRESH
#define NPA_LF_ERR_INT
#define NPA_LF_ERR_INT_W1S
#define NPA_LF_ERR_INT_ENA_W1C
#define NPA_LF_ERR_INT_ENA_W1S
#define NPA_LF_RAS
#define NPA_LF_RAS_W1S
#define NPA_LF_RAS_ENA_W1C
#define NPA_LF_RAS_ENA_W1S
#define NPA_LF_QINTX_CNT(a)
#define NPA_LF_QINTX_INT(a)
#define NPA_LF_QINTX_INT_W1S(a)
#define NPA_LF_QINTX_ENA_W1S(a)
#define NPA_LF_QINTX_ENA_W1C(a)
#define NPA_LF_AURA_BATCH_FREE0

/* NIX LF registers */
#define NIX_LFBASE
#define NIX_LF_RX_SECRETX(a)
#define NIX_LF_CFG
#define NIX_LF_GINT
#define NIX_LF_GINT_W1S
#define NIX_LF_GINT_ENA_W1C
#define NIX_LF_GINT_ENA_W1S
#define NIX_LF_ERR_INT
#define NIX_LF_ERR_INT_W1S
#define NIX_LF_ERR_INT_ENA_W1C
#define NIX_LF_ERR_INT_ENA_W1S
#define NIX_LF_RAS
#define NIX_LF_RAS_W1S
#define NIX_LF_RAS_ENA_W1C
#define NIX_LF_RAS_ENA_W1S
#define NIX_LF_SQ_OP_ERR_DBG
#define NIX_LF_MNQ_ERR_DBG
#define NIX_LF_SEND_ERR_DBG
#define NIX_LF_TX_STATX(a)
#define NIX_LF_RX_STATX(a)
#define NIX_LF_OP_SENDX(a)
#define NIX_LF_RQ_OP_INT
#define NIX_LF_RQ_OP_OCTS
#define NIX_LF_RQ_OP_PKTS
#define NIX_LF_OP_IPSEC_DYNO_CN
#define NIX_LF_SQ_OP_INT
#define NIX_LF_SQ_OP_OCTS
#define NIX_LF_SQ_OP_PKTS
#define NIX_LF_SQ_OP_STATUS
#define NIX_LF_CQ_OP_INT
#define NIX_LF_CQ_OP_DOOR
#define NIX_LF_CQ_OP_STATUS
#define NIX_LF_QINTX_CNT(a)
#define NIX_LF_QINTX_INT(a)
#define NIX_LF_QINTX_INT_W1S(a)
#define NIX_LF_QINTX_ENA_W1S(a)
#define NIX_LF_QINTX_ENA_W1C(a)
#define NIX_LF_CINTX_CNT(a)
#define NIX_LF_CINTX_WAIT(a)
#define NIX_LF_CINTX_INT(a)
#define NIX_LF_CINTX_INT_W1S(a)
#define NIX_LF_CINTX_ENA_W1S(a)
#define NIX_LF_CINTX_ENA_W1C(a)

/* NIX AF transmit scheduler registers */
#define NIX_AF_SMQX_CFG(a)
#define NIX_AF_TL4X_SDP_LINK_CFG(a)
#define NIX_AF_TL1X_SCHEDULE(a)
#define NIX_AF_TL1X_CIR(a)
#define NIX_AF_TL1X_TOPOLOGY(a)
#define NIX_AF_TL2X_PARENT(a)
#define NIX_AF_TL2X_SCHEDULE(a)
#define NIX_AF_TL2X_TOPOLOGY(a)
#define NIX_AF_TL2X_CIR(a)
#define NIX_AF_TL2X_PIR(a)
#define NIX_AF_TL3X_PARENT(a)
#define NIX_AF_TL3X_SCHEDULE(a)
#define NIX_AF_TL3X_SHAPE(a)
#define NIX_AF_TL3X_CIR(a)
#define NIX_AF_TL3X_PIR(a)
#define NIX_AF_TL3X_TOPOLOGY(a)
#define NIX_AF_TL4X_PARENT(a)
#define NIX_AF_TL4X_SCHEDULE(a)
#define NIX_AF_TL4X_SHAPE(a)
#define NIX_AF_TL4X_CIR(a)
#define NIX_AF_TL4X_PIR(a)
#define NIX_AF_TL4X_TOPOLOGY(a)
#define NIX_AF_MDQX_SCHEDULE(a)
#define NIX_AF_MDQX_SHAPE(a)
#define NIX_AF_MDQX_CIR(a)
#define NIX_AF_MDQX_PIR(a)
#define NIX_AF_MDQX_PARENT(a)
#define NIX_AF_TL3_TL2X_LINKX_CFG(a, b)

/* LMT LF registers */
#define LMT_LFBASE
#define LMT_LF_LMTLINEX(a)
#define LMT_LF_LMTCANCEL

#endif /* OTX2_REG_H */