/* SPDX-License-Identifier: GPL-2.0 */ /* Marvell RVU Ethernet driver * * Copyright (C) 2020 Marvell. * */ #ifndef OTX2_TXRX_H #define OTX2_TXRX_H #include <linux/etherdevice.h> #include <linux/iommu.h> #include <linux/if_vlan.h> #include <net/xdp.h> #define LBK_CHAN_BASE … #define SDP_CHAN_BASE … #define CGX_CHAN_BASE … #define OTX2_DATA_ALIGN(X) … #define OTX2_HEAD_ROOM … #define OTX2_ETH_HLEN … #define OTX2_MIN_MTU … #define OTX2_PAGE_POOL_SZ … #define OTX2_MAX_GSO_SEGS … #define OTX2_MAX_FRAGS_IN_SQE … #define MAX_XDP_MTU … /* Rx buffer size should be in multiples of 128bytes */ #define RCV_FRAG_LEN1(x) … /* Prefer 2048 byte buffers for better last level cache * utilization or data distribution across regions. */ #define RCV_FRAG_LEN(x) … #define DMA_BUFFER_LEN(x) … /* IRQ triggered when NIX_LF_CINTX_CNT[ECOUNT] * is equal to this value. */ #define CQ_CQE_THRESH_DEFAULT … /* IRQ triggered when NIX_LF_CINTX_CNT[ECOUNT] * is nonzero and this much time elapses after that. */ #define CQ_TIMER_THRESH_DEFAULT … #define CQ_TIMER_THRESH_MAX … /* Min number of CQs (of the ones mapped to this CINT) * with valid CQEs. */ #define CQ_QCOUNT_DEFAULT … #define CQ_OP_STAT_OP_ERR … #define CQ_OP_STAT_CQ_ERR … /* Packet mark mask */ #define OTX2_RX_MATCH_ID_MASK … struct queue_stats { … }; struct otx2_rcv_queue { … }; struct sg_list { … }; struct otx2_snd_queue { … } ____cacheline_aligned_in_smp; enum cq_type { … }; struct otx2_cq_poll { … }; struct otx2_pool { … }; struct otx2_cq_queue { … } ____cacheline_aligned_in_smp; struct otx2_qset { … }; /* Translate IOVA to physical address */ static inline u64 otx2_iova_to_phys(void *iommu_domain, dma_addr_t dma_addr) { … } int otx2_napi_handler(struct napi_struct *napi, int budget); bool otx2_sq_append_skb(struct net_device *netdev, struct otx2_snd_queue *sq, struct sk_buff *skb, u16 qidx); void cn10k_sqe_flush(void *dev, struct otx2_snd_queue *sq, int size, int qidx); void otx2_sqe_flush(void *dev, struct otx2_snd_queue *sq, int size, int qidx); int otx2_refill_pool_ptrs(void *dev, struct otx2_cq_queue *cq); int cn10k_refill_pool_ptrs(void *dev, struct otx2_cq_queue *cq); #endif /* OTX2_TXRX_H */
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