linux/drivers/net/ethernet/marvell/octeontx2/nic/otx2_struct.h

/* SPDX-License-Identifier: GPL-2.0 */
/* Marvell RVU Ethernet driver
 *
 * Copyright (C) 2020 Marvell.
 *
 */

#ifndef OTX2_STRUCT_H
#define OTX2_STRUCT_H

/* NIX WQE/CQE size 128 byte or 512 byte */
enum nix_cqesz_e {};

enum nix_sqes_e {};

enum nix_send_ldtype {};

/* CSUM offload */
enum nix_sendl3type {};

enum nix_sendl4type {};

/* NIX wqe/cqe types */
enum nix_xqe_type {};

/* NIX CQE/SQE subdescriptor types */
enum nix_subdc {};

/* Algorithm for nix_sqe_mem_s header (value of the `alg` field) */
enum nix_sendmemalg {};

/* NIX CQE header structure */
struct nix_cqe_hdr_s {};

/* NIX CQE RX parse structure */
struct nix_rx_parse_s {};

/* NIX CQE RX scatter/gather subdescriptor structure */
struct nix_rx_sg_s {};

struct nix_send_comp_s {};

struct nix_cqe_rx_s {};

struct nix_cqe_tx_s {};

/* NIX SQE header structure */
struct nix_sqe_hdr_s {};

/* NIX send extended header subdescriptor structure */
struct nix_sqe_ext_s {};

struct nix_sqe_sg_s {};

/* NIX send memory subdescriptor structure */
struct nix_sqe_mem_s {};

enum nix_cqerrint_e {};

#define NIX_CQERRINT_BITS

enum nix_rqint_e {};

#define NIX_RQINT_BITS

enum nix_sqint_e {};

#define NIX_SQINT_BITS

enum nix_sqoperr_e {};

enum nix_mnqerr_e {};

enum nix_snd_status_e {};

#endif /* OTX2_STRUCT_H */