/* * Copyright (c) 2006, 2007 Cisco Systems, Inc. All rights reserved. * * This software is available to you under a choice of one of two * licenses. You may choose to be licensed under the terms of the GNU * General Public License (GPL) Version 2, available from the file * COPYING in the main directory of this source tree, or the * OpenIB.org BSD license below: * * Redistribution and use in source and binary forms, with or * without modification, are permitted provided that the following * conditions are met: * * - Redistributions of source code must retain the above * copyright notice, this list of conditions and the following * disclaimer. * * - Redistributions in binary form must reproduce the above * copyright notice, this list of conditions and the following * disclaimer in the documentation and/or other materials * provided with the distribution. * * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE * SOFTWARE. */ #ifndef MLX4_DEVICE_H #define MLX4_DEVICE_H #include <linux/auxiliary_bus.h> #include <linux/if_ether.h> #include <linux/pci.h> #include <linux/completion.h> #include <linux/radix-tree.h> #include <linux/cpu_rmap.h> #include <linux/crash_dump.h> #include <linux/refcount.h> #include <linux/timecounter.h> #define DEFAULT_UAR_PAGE_SHIFT … #define MAX_MSIX … #define MIN_MSIX_P_PORT … #define MLX4_IS_LEGACY_EQ_MODE(dev_cap) … #define MLX4_MAX_100M_UNITS_VAL … #define MLX4_RATELIMIT_100M_UNITS … #define MLX4_RATELIMIT_1G_UNITS … #define MLX4_RATELIMIT_DEFAULT … #define MLX4_ROCE_MAX_GIDS … #define MLX4_ROCE_PF_GIDS … enum { … }; enum { … }; enum { … }; /* base qkey for use in sriov tunnel-qp/proxy-qp communication. * These qkeys must not be allowed for general use. This is a 64k range, * and to test for violation, we use the mask (protect against future chg). */ #define MLX4_RESERVED_QKEY_BASE … #define MLX4_RESERVED_QKEY_MASK … enum { … }; enum { … }; /* Driver supports 3 different device methods to manage traffic steering: * -device managed - High level API for ib and eth flow steering. FW is * managing flow steering tables. * - B0 steering mode - Common low level API for ib and (if supported) eth. * - A0 steering mode - Limited low level API for eth. In case of IB, * B0 mode is in use. */ enum { … }; enum { … }; static inline const char *mlx4_steering_mode_str(int steering_mode) { … } enum { … }; enum { … }; enum { … }; enum { … }; enum { … }; /* bit enums for an 8-bit flags field indicating special use * QPs which require special handling in qp_reserve_range. * Currently, this only includes QPs used by the ETH interface, * where we expect to use blueflame. These QPs must not have * bits 6 and 7 set in their qp number. * * This enum may use only bits 0..7. */ enum { … }; enum { … }; enum { … }; #define MLX4_ATTR_EXTENDED_PORT_INFO … enum { … }; enum { … }; enum mlx4_event { … }; enum { … }; enum { … }; enum { … }; enum slave_port_state { … }; enum slave_port_gen_event { … }; enum slave_port_state_event { … }; enum { … }; enum { … }; enum { … }; enum mlx4_protocol { … }; enum { … }; enum mlx4_qp_region { … }; enum mlx4_port_type { … }; enum mlx4_special_vlan_idx { … }; enum mlx4_steer_type { … }; enum mlx4_resource_usage { … }; enum { … }; enum { … }; enum { … }; enum { … }; /* Port mgmt change event handling */ enum { … }; sl2vl_tbl_to_u64; enum { … }; enum { … }; #define MSTR_SM_CHANGE_MASK … enum mlx4_module_id { … }; enum { … }; struct mlx4_rate_limit_caps { … }; static inline u64 mlx4_fw_ver(u64 major, u64 minor, u64 subminor) { … } struct mlx4_phys_caps { … }; struct mlx4_spec_qps { … }; struct mlx4_caps { … }; struct mlx4_buf_list { … }; struct mlx4_buf { … }; struct mlx4_mtt { … }; enum { … }; struct mlx4_db_pgdir { … }; struct mlx4_ib_user_db_page; struct mlx4_db { … }; struct mlx4_hwq_resources { … }; struct mlx4_mr { … }; enum mlx4_mw_type { … }; struct mlx4_mw { … }; struct mlx4_uar { … }; struct mlx4_bf { … }; struct mlx4_cq { … }; struct mlx4_qp { … }; struct mlx4_srq { … }; struct mlx4_av { … }; struct mlx4_eth_av { … }; mlx4_ext_av; /* Counters should be saturate once they reach their maximum value */ #define ASSIGN_32BIT_COUNTER(counter, value) … struct mlx4_counter { … }; struct mlx4_quotas { … }; struct mlx4_vf_dev { … }; struct mlx4_fw_crdump { … }; enum mlx4_pci_status { … }; struct mlx4_dev_persistent { … }; struct mlx4_dev { … }; struct mlx4_adev { … }; struct mlx4_clock_params { … }; struct mlx4_eqe { … } __packed; struct mlx4_init_port_param { … }; #define MAD_IFC_DATA_SZ … /* MAD IFC Mailbox */ struct mlx4_mad_ifc { … } __packed; #define mlx4_foreach_port(port, dev, type) … #define mlx4_foreach_ib_transport_port(port, dev) … #define MLX4_INVALID_SLAVE_ID … #define MLX4_SINK_COUNTER_INDEX(dev) … void handle_port_mgmt_change_event(struct work_struct *work); static inline int mlx4_master_func_num(struct mlx4_dev *dev) { … } static inline int mlx4_is_master(struct mlx4_dev *dev) { … } static inline int mlx4_num_reserved_sqps(struct mlx4_dev *dev) { … } static inline int mlx4_is_qp_reserved(struct mlx4_dev *dev, u32 qpn) { … } static inline int mlx4_is_guest_proxy(struct mlx4_dev *dev, int slave, u32 qpn) { … } static inline int mlx4_is_mfunc(struct mlx4_dev *dev) { … } static inline int mlx4_is_slave(struct mlx4_dev *dev) { … } static inline int mlx4_is_eth(struct mlx4_dev *dev, int port) { … } int mlx4_buf_alloc(struct mlx4_dev *dev, int size, int max_direct, struct mlx4_buf *buf); void mlx4_buf_free(struct mlx4_dev *dev, int size, struct mlx4_buf *buf); static inline void *mlx4_buf_offset(struct mlx4_buf *buf, int offset) { … } static inline int mlx4_is_bonded(struct mlx4_dev *dev) { … } static inline int mlx4_is_mf_bonded(struct mlx4_dev *dev) { … } int mlx4_queue_bond_work(struct mlx4_dev *dev, int is_bonded, u8 v2p_p1, u8 v2p_p2); int mlx4_pd_alloc(struct mlx4_dev *dev, u32 *pdn); void mlx4_pd_free(struct mlx4_dev *dev, u32 pdn); int mlx4_xrcd_alloc(struct mlx4_dev *dev, u32 *xrcdn); void mlx4_xrcd_free(struct mlx4_dev *dev, u32 xrcdn); int mlx4_uar_alloc(struct mlx4_dev *dev, struct mlx4_uar *uar); void mlx4_uar_free(struct mlx4_dev *dev, struct mlx4_uar *uar); int mlx4_bf_alloc(struct mlx4_dev *dev, struct mlx4_bf *bf, int node); void mlx4_bf_free(struct mlx4_dev *dev, struct mlx4_bf *bf); int mlx4_mtt_init(struct mlx4_dev *dev, int npages, int page_shift, struct mlx4_mtt *mtt); void mlx4_mtt_cleanup(struct mlx4_dev *dev, struct mlx4_mtt *mtt); u64 mlx4_mtt_addr(struct mlx4_dev *dev, struct mlx4_mtt *mtt); int mlx4_mr_alloc(struct mlx4_dev *dev, u32 pd, u64 iova, u64 size, u32 access, int npages, int page_shift, struct mlx4_mr *mr); int mlx4_mr_free(struct mlx4_dev *dev, struct mlx4_mr *mr); int mlx4_mr_enable(struct mlx4_dev *dev, struct mlx4_mr *mr); int mlx4_mw_alloc(struct mlx4_dev *dev, u32 pd, enum mlx4_mw_type type, struct mlx4_mw *mw); void mlx4_mw_free(struct mlx4_dev *dev, struct mlx4_mw *mw); int mlx4_mw_enable(struct mlx4_dev *dev, struct mlx4_mw *mw); int mlx4_write_mtt(struct mlx4_dev *dev, struct mlx4_mtt *mtt, int start_index, int npages, u64 *page_list); int mlx4_buf_write_mtt(struct mlx4_dev *dev, struct mlx4_mtt *mtt, struct mlx4_buf *buf); int mlx4_db_alloc(struct mlx4_dev *dev, struct mlx4_db *db, int order); void mlx4_db_free(struct mlx4_dev *dev, struct mlx4_db *db); int mlx4_alloc_hwq_res(struct mlx4_dev *dev, struct mlx4_hwq_resources *wqres, int size); void mlx4_free_hwq_res(struct mlx4_dev *mdev, struct mlx4_hwq_resources *wqres, int size); int mlx4_cq_alloc(struct mlx4_dev *dev, int nent, struct mlx4_mtt *mtt, struct mlx4_uar *uar, u64 db_rec, struct mlx4_cq *cq, unsigned int vector, int collapsed, int timestamp_en, void *buf_addr, bool user_cq); void mlx4_cq_free(struct mlx4_dev *dev, struct mlx4_cq *cq); int mlx4_qp_reserve_range(struct mlx4_dev *dev, int cnt, int align, int *base, u8 flags, u8 usage); void mlx4_qp_release_range(struct mlx4_dev *dev, int base_qpn, int cnt); int mlx4_qp_alloc(struct mlx4_dev *dev, int qpn, struct mlx4_qp *qp); void mlx4_qp_free(struct mlx4_dev *dev, struct mlx4_qp *qp); int mlx4_srq_alloc(struct mlx4_dev *dev, u32 pdn, u32 cqn, u16 xrcdn, struct mlx4_mtt *mtt, u64 db_rec, struct mlx4_srq *srq); void mlx4_srq_free(struct mlx4_dev *dev, struct mlx4_srq *srq); int mlx4_srq_arm(struct mlx4_dev *dev, struct mlx4_srq *srq, int limit_watermark); int mlx4_srq_query(struct mlx4_dev *dev, struct mlx4_srq *srq, int *limit_watermark); int mlx4_INIT_PORT(struct mlx4_dev *dev, int port); int mlx4_CLOSE_PORT(struct mlx4_dev *dev, int port); int mlx4_unicast_attach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], int block_mcast_loopback, enum mlx4_protocol prot); int mlx4_unicast_detach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], enum mlx4_protocol prot); int mlx4_multicast_attach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], u8 port, int block_mcast_loopback, enum mlx4_protocol protocol, u64 *reg_id); int mlx4_multicast_detach(struct mlx4_dev *dev, struct mlx4_qp *qp, u8 gid[16], enum mlx4_protocol protocol, u64 reg_id); enum { … }; enum mlx4_net_trans_rule_id { … }; extern const u16 __sw_id_hw[]; static inline int map_hw_to_sw_id(u16 header_id) { … } enum mlx4_net_trans_promisc_mode { … }; struct mlx4_spec_eth { … }; struct mlx4_spec_tcp_udp { … }; struct mlx4_spec_ipv4 { … }; struct mlx4_spec_ib { … }; struct mlx4_spec_vxlan { … }; struct mlx4_spec_list { … }; enum mlx4_net_trans_hw_rule_queue { … }; struct mlx4_net_trans_rule { … }; struct mlx4_net_trans_rule_hw_ctrl { … }; struct mlx4_net_trans_rule_hw_ib { … } __packed; struct mlx4_net_trans_rule_hw_eth { … } __packed; struct mlx4_net_trans_rule_hw_tcp_udp { … } __packed; struct mlx4_net_trans_rule_hw_ipv4 { … } __packed; struct mlx4_net_trans_rule_hw_vxlan { … } __packed; struct _rule_hw { … }; enum { … }; enum { … }; int mlx4_flow_steer_promisc_add(struct mlx4_dev *dev, u8 port, u32 qpn, enum mlx4_net_trans_promisc_mode mode); int mlx4_flow_steer_promisc_remove(struct mlx4_dev *dev, u8 port, enum mlx4_net_trans_promisc_mode mode); int mlx4_multicast_promisc_add(struct mlx4_dev *dev, u32 qpn, u8 port); int mlx4_multicast_promisc_remove(struct mlx4_dev *dev, u32 qpn, u8 port); int mlx4_unicast_promisc_add(struct mlx4_dev *dev, u32 qpn, u8 port); int mlx4_unicast_promisc_remove(struct mlx4_dev *dev, u32 qpn, u8 port); int mlx4_SET_MCAST_FLTR(struct mlx4_dev *dev, u8 port, u64 mac, u64 clear, u8 mode); int mlx4_register_mac(struct mlx4_dev *dev, u8 port, u64 mac); void mlx4_unregister_mac(struct mlx4_dev *dev, u8 port, u64 mac); int mlx4_get_base_qpn(struct mlx4_dev *dev, u8 port); int __mlx4_replace_mac(struct mlx4_dev *dev, u8 port, int qpn, u64 new_mac); int mlx4_SET_PORT_general(struct mlx4_dev *dev, u8 port, int mtu, u8 pptx, u8 pfctx, u8 pprx, u8 pfcrx); int mlx4_SET_PORT_user_mac(struct mlx4_dev *dev, u8 port, u8 *user_mac); int mlx4_SET_PORT_user_mtu(struct mlx4_dev *dev, u8 port, u16 user_mtu); int mlx4_SET_PORT_qpn_calc(struct mlx4_dev *dev, u8 port, u32 base_qpn, u8 promisc); int mlx4_SET_PORT_BEACON(struct mlx4_dev *dev, u8 port, u16 time); int mlx4_SET_PORT_fcs_check(struct mlx4_dev *dev, u8 port, u8 ignore_fcs_value); int mlx4_SET_PORT_VXLAN(struct mlx4_dev *dev, u8 port, u8 steering, int enable); int set_phv_bit(struct mlx4_dev *dev, u8 port, int new_val); int get_phv_bit(struct mlx4_dev *dev, u8 port, int *phv); int mlx4_get_is_vlan_offload_disabled(struct mlx4_dev *dev, u8 port, bool *vlan_offload_disabled); void mlx4_handle_eth_header_mcast_prio(struct mlx4_net_trans_rule_hw_ctrl *ctrl, struct _rule_hw *eth_header); int mlx4_find_cached_mac(struct mlx4_dev *dev, u8 port, u64 mac, int *idx); int mlx4_find_cached_vlan(struct mlx4_dev *dev, u8 port, u16 vid, int *idx); int mlx4_register_vlan(struct mlx4_dev *dev, u8 port, u16 vlan, int *index); void mlx4_unregister_vlan(struct mlx4_dev *dev, u8 port, u16 vlan); int mlx4_SYNC_TPT(struct mlx4_dev *dev); int mlx4_test_interrupt(struct mlx4_dev *dev, int vector); int mlx4_test_async(struct mlx4_dev *dev); int mlx4_query_diag_counters(struct mlx4_dev *dev, u8 op_modifier, const u32 offset[], u32 value[], size_t array_len, u8 port); u32 mlx4_get_eqs_per_port(struct mlx4_dev *dev, u8 port); bool mlx4_is_eq_vector_valid(struct mlx4_dev *dev, u8 port, int vector); struct cpu_rmap *mlx4_get_cpu_rmap(struct mlx4_dev *dev, int port); int mlx4_assign_eq(struct mlx4_dev *dev, u8 port, int *vector); void mlx4_release_eq(struct mlx4_dev *dev, int vec); int mlx4_is_eq_shared(struct mlx4_dev *dev, int vector); int mlx4_eq_get_irq(struct mlx4_dev *dev, int vec); int mlx4_get_phys_port_id(struct mlx4_dev *dev); int mlx4_wol_read(struct mlx4_dev *dev, u64 *config, int port); int mlx4_wol_write(struct mlx4_dev *dev, u64 config, int port); int mlx4_counter_alloc(struct mlx4_dev *dev, u32 *idx, u8 usage); void mlx4_counter_free(struct mlx4_dev *dev, u32 idx); int mlx4_get_default_counter_index(struct mlx4_dev *dev, int port); void mlx4_set_admin_guid(struct mlx4_dev *dev, __be64 guid, int entry, int port); __be64 mlx4_get_admin_guid(struct mlx4_dev *dev, int entry, int port); void mlx4_set_random_admin_guid(struct mlx4_dev *dev, int entry, int port); int mlx4_flow_attach(struct mlx4_dev *dev, struct mlx4_net_trans_rule *rule, u64 *reg_id); int mlx4_flow_detach(struct mlx4_dev *dev, u64 reg_id); int mlx4_map_sw_to_hw_steering_mode(struct mlx4_dev *dev, enum mlx4_net_trans_promisc_mode flow_type); int mlx4_map_sw_to_hw_steering_id(struct mlx4_dev *dev, enum mlx4_net_trans_rule_id id); int mlx4_hw_rule_sz(struct mlx4_dev *dev, enum mlx4_net_trans_rule_id id); int mlx4_tunnel_steer_add(struct mlx4_dev *dev, const unsigned char *addr, int port, int qpn, u16 prio, u64 *reg_id); void mlx4_sync_pkey_table(struct mlx4_dev *dev, int slave, int port, int i, int val); int mlx4_get_parav_qkey(struct mlx4_dev *dev, u32 qpn, u32 *qkey); int mlx4_is_slave_active(struct mlx4_dev *dev, int slave); int mlx4_gen_pkey_eqe(struct mlx4_dev *dev, int slave, u8 port); int mlx4_gen_guid_change_eqe(struct mlx4_dev *dev, int slave, u8 port); int mlx4_gen_slaves_port_mgt_ev(struct mlx4_dev *dev, u8 port, int attr); int mlx4_gen_port_state_change_eqe(struct mlx4_dev *dev, int slave, u8 port, u8 port_subtype_change); enum slave_port_state mlx4_get_slave_port_state(struct mlx4_dev *dev, int slave, u8 port); int set_and_calc_slave_port_state(struct mlx4_dev *dev, int slave, u8 port, int event, enum slave_port_gen_event *gen_event); void mlx4_put_slave_node_guid(struct mlx4_dev *dev, int slave, __be64 guid); __be64 mlx4_get_slave_node_guid(struct mlx4_dev *dev, int slave); int mlx4_get_slave_from_roce_gid(struct mlx4_dev *dev, int port, u8 *gid, int *slave_id); int mlx4_get_roce_gid_from_slave(struct mlx4_dev *dev, int port, int slave_id, u8 *gid); int mlx4_FLOW_STEERING_IB_UC_QP_RANGE(struct mlx4_dev *dev, u32 min_range_qpn, u32 max_range_qpn); u64 mlx4_read_clock(struct mlx4_dev *dev); struct mlx4_active_ports { … }; /* Returns a bitmap of the physical ports which are assigned to slave */ struct mlx4_active_ports mlx4_get_active_ports(struct mlx4_dev *dev, int slave); /* Returns the physical port that represents the virtual port of the slave, */ /* or a value < 0 in case of an error. If a slave has 2 ports, the identity */ /* mapping is returned. */ int mlx4_slave_convert_port(struct mlx4_dev *dev, int slave, int port); struct mlx4_slaves_pport { … }; /* Returns a bitmap of all slaves that are assigned to port. */ struct mlx4_slaves_pport mlx4_phys_to_slaves_pport(struct mlx4_dev *dev, int port); /* Returns a bitmap of all slaves that are assigned exactly to all the */ /* the ports that are set in crit_ports. */ struct mlx4_slaves_pport mlx4_phys_to_slaves_pport_actv( struct mlx4_dev *dev, const struct mlx4_active_ports *crit_ports); /* Returns the slave's virtual port that represents the physical port. */ int mlx4_phys_to_slave_port(struct mlx4_dev *dev, int slave, int port); int mlx4_get_base_gid_ix(struct mlx4_dev *dev, int slave, int port); int mlx4_config_vxlan_port(struct mlx4_dev *dev, __be16 udp_port); int mlx4_disable_rx_port_check(struct mlx4_dev *dev, bool dis); int mlx4_config_roce_v2_port(struct mlx4_dev *dev, u16 udp_port); int mlx4_virt2phy_port_map(struct mlx4_dev *dev, u32 port1, u32 port2); int mlx4_vf_smi_enabled(struct mlx4_dev *dev, int slave, int port); int mlx4_vf_get_enable_smi_admin(struct mlx4_dev *dev, int slave, int port); int mlx4_vf_set_enable_smi_admin(struct mlx4_dev *dev, int slave, int port, int enable); struct mlx4_mpt_entry; int mlx4_mr_hw_get_mpt(struct mlx4_dev *dev, struct mlx4_mr *mmr, struct mlx4_mpt_entry ***mpt_entry); int mlx4_mr_hw_write_mpt(struct mlx4_dev *dev, struct mlx4_mr *mmr, struct mlx4_mpt_entry **mpt_entry); int mlx4_mr_hw_change_pd(struct mlx4_dev *dev, struct mlx4_mpt_entry *mpt_entry, u32 pdn); int mlx4_mr_hw_change_access(struct mlx4_dev *dev, struct mlx4_mpt_entry *mpt_entry, u32 access); void mlx4_mr_hw_put_mpt(struct mlx4_dev *dev, struct mlx4_mpt_entry **mpt_entry); void mlx4_mr_rereg_mem_cleanup(struct mlx4_dev *dev, struct mlx4_mr *mr); int mlx4_mr_rereg_mem_write(struct mlx4_dev *dev, struct mlx4_mr *mr, u64 iova, u64 size, int npages, int page_shift, struct mlx4_mpt_entry *mpt_entry); int mlx4_get_module_info(struct mlx4_dev *dev, u8 port, u16 offset, u16 size, u8 *data); int mlx4_max_tc(struct mlx4_dev *dev); /* Returns true if running in low memory profile (kdump kernel) */ static inline bool mlx4_low_memory_profile(void) { … } /* ACCESS REG commands */ enum mlx4_access_reg_method { … }; /* ACCESS PTYS Reg command */ enum mlx4_ptys_proto { … }; enum mlx4_ptys_flags { … }; struct mlx4_ptys_reg { … } __packed; int mlx4_ACCESS_PTYS_REG(struct mlx4_dev *dev, enum mlx4_access_reg_method method, struct mlx4_ptys_reg *ptys_reg); int mlx4_get_internal_clock_params(struct mlx4_dev *dev, struct mlx4_clock_params *params); static inline int mlx4_to_hw_uar_index(struct mlx4_dev *dev, int index) { … } static inline int mlx4_get_num_reserved_uar(struct mlx4_dev *dev) { … } #endif /* MLX4_DEVICE_H */
Codebase Browser
linux