linux/drivers/net/ethernet/mellanox/mlx5/core/en_stats.h

/*
 * Copyright (c) 2015-2016, Mellanox Technologies. All rights reserved.
 *
 * This software is available to you under a choice of one of two
 * licenses.  You may choose to be licensed under the terms of the GNU
 * General Public License (GPL) Version 2, available from the file
 * COPYING in the main directory of this source tree, or the
 * OpenIB.org BSD license below:
 *
 *     Redistribution and use in source and binary forms, with or
 *     without modification, are permitted provided that the following
 *     conditions are met:
 *
 *      - Redistributions of source code must retain the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer.
 *
 *      - Redistributions in binary form must reproduce the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer in the documentation and/or other materials
 *        provided with the distribution.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 */

#ifndef __MLX5_EN_STATS_H__
#define __MLX5_EN_STATS_H__

#define MLX5E_READ_CTR64_CPU(ptr, dsc, i)
#define MLX5E_READ_CTR64_BE(ptr, dsc, i)
#define MLX5E_READ_CTR32_CPU(ptr, dsc, i)
#define MLX5E_READ_CTR32_BE(ptr, dsc, i)

#define MLX5E_DECLARE_STAT(type, fld)
#define MLX5E_DECLARE_RX_STAT(type, fld)
#define MLX5E_DECLARE_TX_STAT(type, fld)
#define MLX5E_DECLARE_XDPSQ_STAT(type, fld)
#define MLX5E_DECLARE_RQ_XDPSQ_STAT(type, fld)
#define MLX5E_DECLARE_XSKRQ_STAT(type, fld)
#define MLX5E_DECLARE_XSKSQ_STAT(type, fld)
#define MLX5E_DECLARE_CH_STAT(type, fld)

#define MLX5E_DECLARE_PTP_TX_STAT(type, fld)
#define MLX5E_DECLARE_PTP_CH_STAT(type, fld)
#define MLX5E_DECLARE_PTP_CQ_STAT(type, fld)
#define MLX5E_DECLARE_PTP_RQ_STAT(type, fld)

#define MLX5E_DECLARE_QOS_TX_STAT(type, fld)

struct counter_desc {};

enum {};

struct mlx5e_priv;
struct mlx5e_stats_grp {};

void mlx5e_ethtool_put_stat(u64 **data, u64 val);

mlx5e_stats_grp_t;

#define MLX5E_STATS_GRP_OP(grp, name)

#define MLX5E_DECLARE_STATS_GRP_OP_NUM_STATS(grp)

#define MLX5E_DECLARE_STATS_GRP_OP_UPDATE_STATS(grp)

#define MLX5E_DECLARE_STATS_GRP_OP_FILL_STRS(grp)

#define MLX5E_DECLARE_STATS_GRP_OP_FILL_STATS(grp)

#define MLX5E_STATS_GRP(grp)

#define MLX5E_DECLARE_STATS_GRP(grp)

#define MLX5E_DEFINE_STATS_GRP(grp, mask)

unsigned int mlx5e_stats_total_num(struct mlx5e_priv *priv);
void mlx5e_stats_update(struct mlx5e_priv *priv);
void mlx5e_stats_fill(struct mlx5e_priv *priv, u64 *data, int idx);
void mlx5e_stats_fill_strings(struct mlx5e_priv *priv, u8 *data);
void mlx5e_stats_update_ndo_stats(struct mlx5e_priv *priv);

void mlx5e_stats_pause_get(struct mlx5e_priv *priv,
			   struct ethtool_pause_stats *pause_stats);
void mlx5e_stats_fec_get(struct mlx5e_priv *priv,
			 struct ethtool_fec_stats *fec_stats);

void mlx5e_stats_eth_phy_get(struct mlx5e_priv *priv,
			     struct ethtool_eth_phy_stats *phy_stats);
void mlx5e_stats_eth_mac_get(struct mlx5e_priv *priv,
			     struct ethtool_eth_mac_stats *mac_stats);
void mlx5e_stats_eth_ctrl_get(struct mlx5e_priv *priv,
			      struct ethtool_eth_ctrl_stats *ctrl_stats);
void mlx5e_stats_rmon_get(struct mlx5e_priv *priv,
			  struct ethtool_rmon_stats *rmon,
			  const struct ethtool_rmon_hist_range **ranges);
void mlx5e_stats_ts_get(struct mlx5e_priv *priv,
			struct ethtool_ts_stats *ts_stats);
void mlx5e_get_link_ext_stats(struct net_device *dev,
			      struct ethtool_link_ext_stats *stats);

/* Concrete NIC Stats */

struct mlx5e_sw_stats {};

struct mlx5e_qcounter_stats {};

#define VNIC_ENV_GET(vnic_env_stats, c)

struct mlx5e_vnic_env_stats {};

#define VPORT_COUNTER_GET(vstats, c)

struct mlx5e_vport_stats {};

#define PPORT_802_3_GET(pstats, c)
#define PPORT_2863_GET(pstats, c)
#define PPORT_2819_GET(pstats, c)
#define PPORT_PHY_STATISTICAL_GET(pstats, c)
#define PPORT_PER_PRIO_GET(pstats, prio, c)
#define NUM_PPORT_PRIO
#define PPORT_ETH_EXT_GET(pstats, c)

struct mlx5e_pport_stats {};

#define PCIE_PERF_GET(pcie_stats, c)

#define PCIE_PERF_GET64(pcie_stats, c)

struct mlx5e_pcie_stats {};

struct mlx5e_rq_stats {};

struct mlx5e_sq_stats {};

struct mlx5e_xdpsq_stats {};

struct mlx5e_ch_stats {};

struct mlx5e_ptp_cq_stats {};

struct mlx5e_rep_stats {};

struct mlx5e_stats {};

static inline void mlx5e_stats_copy_rep_stats(struct rtnl_link_stats64 *vf_vport,
					      struct mlx5e_rep_stats *rep_stats)
{}

extern mlx5e_stats_grp_t mlx5e_nic_stats_grps[];
unsigned int mlx5e_nic_stats_grps_num(struct mlx5e_priv *priv);

extern MLX5E_DECLARE_STATS_GRP(sw);
extern MLX5E_DECLARE_STATS_GRP(qcnt);
extern MLX5E_DECLARE_STATS_GRP(vnic_env);
extern MLX5E_DECLARE_STATS_GRP(vport);
extern MLX5E_DECLARE_STATS_GRP(802_3);
extern MLX5E_DECLARE_STATS_GRP(2863);
extern MLX5E_DECLARE_STATS_GRP(2819);
extern MLX5E_DECLARE_STATS_GRP(phy);
extern MLX5E_DECLARE_STATS_GRP(eth_ext);
extern MLX5E_DECLARE_STATS_GRP(pcie);
extern MLX5E_DECLARE_STATS_GRP(per_prio);
extern MLX5E_DECLARE_STATS_GRP(pme);
extern MLX5E_DECLARE_STATS_GRP(channels);
extern MLX5E_DECLARE_STATS_GRP(per_port_buff_congest);
extern MLX5E_DECLARE_STATS_GRP(ipsec_hw);
extern MLX5E_DECLARE_STATS_GRP(ipsec_sw);
extern MLX5E_DECLARE_STATS_GRP(ptp);
extern MLX5E_DECLARE_STATS_GRP(macsec_hw);

#endif /* __MLX5_EN_STATS_H__ */