linux/drivers/net/ethernet/mellanox/mlx5/core/lib/pci_vsc.c

// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
/* Copyright (c) 2019 Mellanox Technologies */

#include <linux/pci.h>
#include "mlx5_core.h"
#include "pci_vsc.h"

#define MLX5_EXTRACT_C(source, offset, size) …
#define MLX5_EXTRACT(src, start, len) …
#define MLX5_ONES32(size) …
#define MLX5_MASK32(offset, size) …
#define MLX5_MERGE_C(rsrc1, rsrc2, start, len) …
#define MLX5_MERGE(rsrc1, rsrc2, start, len) …
#define vsc_read(dev, offset, val) …
#define vsc_write(dev, offset, val) …
#define VSC_MAX_RETRIES …

enum { … };

void mlx5_pci_vsc_init(struct mlx5_core_dev *dev)
{ … }

int mlx5_vsc_gw_lock(struct mlx5_core_dev *dev)
{ … }

int mlx5_vsc_gw_unlock(struct mlx5_core_dev *dev)
{ … }

int mlx5_vsc_gw_set_space(struct mlx5_core_dev *dev, u16 space,
			  u32 *ret_space_size)
{ … }

static int mlx5_vsc_wait_on_flag(struct mlx5_core_dev *dev, u8 expected_val)
{ … }

static int mlx5_vsc_gw_write(struct mlx5_core_dev *dev, unsigned int address,
			     u32 data)
{ … }

static int mlx5_vsc_gw_read(struct mlx5_core_dev *dev, unsigned int address,
			    u32 *data)
{ … }

static int mlx5_vsc_gw_read_fast(struct mlx5_core_dev *dev,
				 unsigned int read_addr,
				 unsigned int *next_read_addr,
				 u32 *data)
{ … }

int mlx5_vsc_gw_read_block_fast(struct mlx5_core_dev *dev, u32 *data,
				int length)
{ … }

int mlx5_vsc_sem_set_space(struct mlx5_core_dev *dev, u16 space,
			   enum mlx5_vsc_state state)
{ … }