#include <linux/highmem.h>
#include <linux/module.h>
#include <linux/init.h>
#include <linux/errno.h>
#include <linux/pci.h>
#include <linux/dma-mapping.h>
#include <linux/slab.h>
#include <linux/interrupt.h>
#include <linux/delay.h>
#include <linux/mlx5/driver.h>
#include <linux/mlx5/cq.h>
#include <linux/mlx5/qp.h>
#include <linux/debugfs.h>
#include <linux/kmod.h>
#include <linux/mlx5/mlx5_ifc.h>
#include <linux/mlx5/vport.h>
#include <linux/version.h>
#include <net/devlink.h>
#include "mlx5_core.h"
#include "lib/eq.h"
#include "fs_core.h"
#include "lib/mpfs.h"
#include "eswitch.h"
#include "devlink.h"
#include "fw_reset.h"
#include "lib/mlx5.h"
#include "lib/tout.h"
#include "fpga/core.h"
#include "en_accel/ipsec.h"
#include "lib/clock.h"
#include "lib/vxlan.h"
#include "lib/geneve.h"
#include "lib/devcom.h"
#include "lib/pci_vsc.h"
#include "diag/fw_tracer.h"
#include "ecpf.h"
#include "lib/hv_vhca.h"
#include "diag/rsc_dump.h"
#include "sf/vhca_event.h"
#include "sf/dev/dev.h"
#include "sf/sf.h"
#include "mlx5_irq.h"
#include "hwmon.h"
#include "lag/lag.h"
MODULE_AUTHOR(…) …;
MODULE_DESCRIPTION(…) …;
MODULE_LICENSE(…) …;
unsigned int mlx5_core_debug_mask;
module_param_named(debug_mask, mlx5_core_debug_mask, uint, 0644);
MODULE_PARM_DESC(…) …;
static unsigned int prof_sel = …;
module_param_named(prof_sel, prof_sel, uint, 0444);
MODULE_PARM_DESC(…) …;
static u32 sw_owner_id[4];
#define MAX_SW_VHCA_ID …
static DEFINE_IDA(sw_vhca_ida);
enum { … };
#define LOG_MAX_SUPPORTED_QPS …
static struct mlx5_profile profile[] = …;
static int wait_fw_init(struct mlx5_core_dev *dev, u32 max_wait_mili,
u32 warn_time_mili, const char *init_state)
{ … }
static void mlx5_set_driver_version(struct mlx5_core_dev *dev)
{ … }
static int set_dma_caps(struct pci_dev *pdev)
{ … }
static int mlx5_pci_enable_device(struct mlx5_core_dev *dev)
{ … }
static void mlx5_pci_disable_device(struct mlx5_core_dev *dev)
{ … }
static int request_bar(struct pci_dev *pdev)
{ … }
static void release_bar(struct pci_dev *pdev)
{ … }
struct mlx5_reg_host_endianness { … };
static u16 to_fw_pkey_sz(struct mlx5_core_dev *dev, u32 size)
{ … }
void mlx5_core_uplink_netdev_set(struct mlx5_core_dev *dev, struct net_device *netdev)
{ … }
void mlx5_core_uplink_netdev_event_replay(struct mlx5_core_dev *dev)
{ … }
EXPORT_SYMBOL(…);
void mlx5_core_mp_event_replay(struct mlx5_core_dev *dev, u32 event, void *data)
{ … }
EXPORT_SYMBOL(…);
int mlx5_core_get_caps_mode(struct mlx5_core_dev *dev, enum mlx5_cap_type cap_type,
enum mlx5_cap_mode cap_mode)
{ … }
int mlx5_core_get_caps(struct mlx5_core_dev *dev, enum mlx5_cap_type cap_type)
{ … }
static int set_caps(struct mlx5_core_dev *dev, void *in, int opmod)
{ … }
static int handle_hca_cap_atomic(struct mlx5_core_dev *dev, void *set_ctx)
{ … }
static int handle_hca_cap_odp(struct mlx5_core_dev *dev, void *set_ctx)
{ … }
static int max_uc_list_get_devlink_param(struct mlx5_core_dev *dev)
{ … }
bool mlx5_is_roce_on(struct mlx5_core_dev *dev)
{ … }
EXPORT_SYMBOL(…);
static int handle_hca_cap_2(struct mlx5_core_dev *dev, void *set_ctx)
{ … }
static int handle_hca_cap(struct mlx5_core_dev *dev, void *set_ctx)
{ … }
static bool is_roce_fw_disabled(struct mlx5_core_dev *dev)
{ … }
static int handle_hca_cap_roce(struct mlx5_core_dev *dev, void *set_ctx)
{ … }
static int handle_hca_cap_port_selection(struct mlx5_core_dev *dev,
void *set_ctx)
{ … }
static int set_hca_cap(struct mlx5_core_dev *dev)
{ … }
static int set_hca_ctrl(struct mlx5_core_dev *dev)
{ … }
static int mlx5_core_set_hca_defaults(struct mlx5_core_dev *dev)
{ … }
int mlx5_core_enable_hca(struct mlx5_core_dev *dev, u16 func_id)
{ … }
int mlx5_core_disable_hca(struct mlx5_core_dev *dev, u16 func_id)
{ … }
static int mlx5_core_set_issi(struct mlx5_core_dev *dev)
{ … }
static int mlx5_pci_init(struct mlx5_core_dev *dev, struct pci_dev *pdev,
const struct pci_device_id *id)
{ … }
static void mlx5_pci_close(struct mlx5_core_dev *dev)
{ … }
static void mlx5_register_hca_devcom_comp(struct mlx5_core_dev *dev)
{ … }
static void mlx5_unregister_hca_devcom_comp(struct mlx5_core_dev *dev)
{ … }
static int mlx5_init_once(struct mlx5_core_dev *dev)
{ … }
static void mlx5_cleanup_once(struct mlx5_core_dev *dev)
{ … }
static int mlx5_function_enable(struct mlx5_core_dev *dev, bool boot, u64 timeout)
{ … }
static void mlx5_function_disable(struct mlx5_core_dev *dev, bool boot)
{ … }
static int mlx5_function_open(struct mlx5_core_dev *dev)
{ … }
static int mlx5_function_close(struct mlx5_core_dev *dev)
{ … }
static int mlx5_function_setup(struct mlx5_core_dev *dev, bool boot, u64 timeout)
{ … }
static int mlx5_function_teardown(struct mlx5_core_dev *dev, bool boot)
{ … }
static int mlx5_load(struct mlx5_core_dev *dev)
{ … }
static void mlx5_unload(struct mlx5_core_dev *dev)
{ … }
int mlx5_init_one_devl_locked(struct mlx5_core_dev *dev)
{ … }
int mlx5_init_one(struct mlx5_core_dev *dev)
{ … }
void mlx5_uninit_one(struct mlx5_core_dev *dev)
{ … }
int mlx5_load_one_devl_locked(struct mlx5_core_dev *dev, bool recovery)
{ … }
int mlx5_load_one(struct mlx5_core_dev *dev, bool recovery)
{ … }
void mlx5_unload_one_devl_locked(struct mlx5_core_dev *dev, bool suspend)
{ … }
void mlx5_unload_one(struct mlx5_core_dev *dev, bool suspend)
{ … }
static int mlx5_query_hca_caps_light(struct mlx5_core_dev *dev)
{ … }
int mlx5_init_one_light(struct mlx5_core_dev *dev)
{ … }
void mlx5_uninit_one_light(struct mlx5_core_dev *dev)
{ … }
void mlx5_unload_one_light(struct mlx5_core_dev *dev)
{ … }
static const int types[] = …;
static void mlx5_hca_caps_free(struct mlx5_core_dev *dev)
{ … }
static int mlx5_hca_caps_alloc(struct mlx5_core_dev *dev)
{ … }
static int vhca_id_show(struct seq_file *file, void *priv)
{ … }
DEFINE_SHOW_ATTRIBUTE(…);
int mlx5_mdev_init(struct mlx5_core_dev *dev, int profile_idx)
{ … }
void mlx5_mdev_uninit(struct mlx5_core_dev *dev)
{ … }
static int probe_one(struct pci_dev *pdev, const struct pci_device_id *id)
{ … }
static void remove_one(struct pci_dev *pdev)
{ … }
#define mlx5_pci_trace(dev, fmt, ...) …
static const char *result2str(enum pci_ers_result result)
{ … }
static pci_ers_result_t mlx5_pci_err_detected(struct pci_dev *pdev,
pci_channel_state_t state)
{ … }
static int wait_vital(struct pci_dev *pdev)
{ … }
static pci_ers_result_t mlx5_pci_slot_reset(struct pci_dev *pdev)
{ … }
static void mlx5_pci_resume(struct pci_dev *pdev)
{ … }
static const struct pci_error_handlers mlx5_err_handler = …;
static int mlx5_try_fast_unload(struct mlx5_core_dev *dev)
{ … }
static void shutdown(struct pci_dev *pdev)
{ … }
static int mlx5_suspend(struct pci_dev *pdev, pm_message_t state)
{ … }
static int mlx5_resume(struct pci_dev *pdev)
{ … }
static const struct pci_device_id mlx5_core_pci_table[] = …;
MODULE_DEVICE_TABLE(pci, mlx5_core_pci_table);
void mlx5_disable_device(struct mlx5_core_dev *dev)
{ … }
int mlx5_recover_device(struct mlx5_core_dev *dev)
{ … }
static struct pci_driver mlx5_core_driver = …;
struct mlx5_core_dev *mlx5_vf_get_core_dev(struct pci_dev *pdev)
{ … }
EXPORT_SYMBOL(…);
void mlx5_vf_put_core_dev(struct mlx5_core_dev *mdev)
{ … }
EXPORT_SYMBOL(…);
static void mlx5_core_verify_params(void)
{ … }
static int __init mlx5_init(void)
{ … }
static void __exit mlx5_cleanup(void)
{ … }
module_init(…) …;
module_exit(mlx5_cleanup);