linux/drivers/net/ethernet/mellanox/mlx5/core/fw_reset.c

// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
/* Copyright (c) 2020, Mellanox Technologies inc.  All rights reserved. */

#include <devlink.h>

#include "fw_reset.h"
#include "diag/fw_tracer.h"
#include "lib/tout.h"

enum { … };

struct mlx5_fw_reset { … };

enum { … };

enum { … };

static u8 mlx5_get_fw_rst_state(struct mlx5_core_dev *dev)
{ … }

static void mlx5_set_fw_rst_ack(struct mlx5_core_dev *dev)
{ … }

static int mlx5_fw_reset_enable_remote_dev_reset_set(struct devlink *devlink, u32 id,
						     struct devlink_param_gset_ctx *ctx,
						     struct netlink_ext_ack *extack)
{ … }

static int mlx5_fw_reset_enable_remote_dev_reset_get(struct devlink *devlink, u32 id,
						     struct devlink_param_gset_ctx *ctx)
{ … }

static int mlx5_reg_mfrl_set(struct mlx5_core_dev *dev, u8 reset_level,
			     u8 reset_type_sel, u8 sync_resp, bool sync_start)
{ … }

static int mlx5_reg_mfrl_query(struct mlx5_core_dev *dev, u8 *reset_level,
			       u8 *reset_type, u8 *reset_state)
{ … }

int mlx5_fw_reset_query(struct mlx5_core_dev *dev, u8 *reset_level, u8 *reset_type)
{ … }

static int mlx5_fw_reset_get_reset_state_err(struct mlx5_core_dev *dev,
					     struct netlink_ext_ack *extack)
{ … }

int mlx5_fw_reset_set_reset_sync(struct mlx5_core_dev *dev, u8 reset_type_sel,
				 struct netlink_ext_ack *extack)
{ … }

int mlx5_fw_reset_verify_fw_complete(struct mlx5_core_dev *dev,
				     struct netlink_ext_ack *extack)
{ … }

int mlx5_fw_reset_set_live_patch(struct mlx5_core_dev *dev)
{ … }

static void mlx5_fw_reset_complete_reload(struct mlx5_core_dev *dev, bool unloaded)
{ … }

static void mlx5_stop_sync_reset_poll(struct mlx5_core_dev *dev)
{ … }

static int mlx5_sync_reset_clear_reset_requested(struct mlx5_core_dev *dev, bool poll_health)
{ … }

static void mlx5_sync_reset_reload_work(struct work_struct *work)
{ … }

#define MLX5_RESET_POLL_INTERVAL …
static void poll_sync_reset(struct timer_list *t)
{ … }

static void mlx5_start_sync_reset_poll(struct mlx5_core_dev *dev)
{ … }

static int mlx5_fw_reset_set_reset_sync_ack(struct mlx5_core_dev *dev)
{ … }

static int mlx5_fw_reset_set_reset_sync_nack(struct mlx5_core_dev *dev)
{ … }

static int mlx5_sync_reset_set_reset_requested(struct mlx5_core_dev *dev)
{ … }

static void mlx5_fw_live_patch_event(struct work_struct *work)
{ … }

#if IS_ENABLED(CONFIG_HOTPLUG_PCI_PCIE)
static int mlx5_check_hotplug_interrupt(struct mlx5_core_dev *dev)
{ … }
#endif

static const struct pci_device_id mgt_ifc_device_ids[] = …;

static bool mlx5_is_mgt_ifc_pci_device(struct mlx5_core_dev *dev, u16 dev_id)
{ … }

static int mlx5_check_dev_ids(struct mlx5_core_dev *dev, u16 dev_id)
{ … }

static bool mlx5_is_reset_now_capable(struct mlx5_core_dev *dev)
{ … }

static void mlx5_sync_reset_request_event(struct work_struct *work)
{ … }

static int mlx5_pci_link_toggle(struct mlx5_core_dev *dev)
{ … }

static void mlx5_sync_reset_now_event(struct work_struct *work)
{ … }

static void mlx5_sync_reset_unload_event(struct work_struct *work)
{ … }

static void mlx5_sync_reset_abort_event(struct work_struct *work)
{ … }

static void mlx5_sync_reset_events_handle(struct mlx5_fw_reset *fw_reset, struct mlx5_eqe *eqe)
{ … }

static int fw_reset_event_notifier(struct notifier_block *nb, unsigned long action, void *data)
{ … }

int mlx5_fw_reset_wait_reset_done(struct mlx5_core_dev *dev)
{ … }

void mlx5_fw_reset_events_start(struct mlx5_core_dev *dev)
{ … }

void mlx5_fw_reset_events_stop(struct mlx5_core_dev *dev)
{ … }

void mlx5_drain_fw_reset(struct mlx5_core_dev *dev)
{ … }

static const struct devlink_param mlx5_fw_reset_devlink_params[] = …;

int mlx5_fw_reset_init(struct mlx5_core_dev *dev)
{ … }

void mlx5_fw_reset_cleanup(struct mlx5_core_dev *dev)
{ … }