linux/drivers/net/ethernet/mellanox/mlx5/core/lib/clock.c

/*
 * Copyright (c) 2015, Mellanox Technologies. All rights reserved.
 *
 * This software is available to you under a choice of one of two
 * licenses.  You may choose to be licensed under the terms of the GNU
 * General Public License (GPL) Version 2, available from the file
 * COPYING in the main directory of this source tree, or the
 * OpenIB.org BSD license below:
 *
 *     Redistribution and use in source and binary forms, with or
 *     without modification, are permitted provided that the following
 *     conditions are met:
 *
 *      - Redistributions of source code must retain the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer.
 *
 *      - Redistributions in binary form must reproduce the above
 *        copyright notice, this list of conditions and the following
 *        disclaimer in the documentation and/or other materials
 *        provided with the distribution.
 *
 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
 * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
 * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
 * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
 * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
 * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
 * SOFTWARE.
 */

#include <linux/clocksource.h>
#include <linux/highmem.h>
#include <linux/log2.h>
#include <linux/ptp_clock_kernel.h>
#include <rdma/mlx5-abi.h>
#include "lib/eq.h"
#include "en.h"
#include "clock.h"

enum {};

enum {};

enum {};

enum {};

enum {};

static bool mlx5_real_time_mode(struct mlx5_core_dev *mdev)
{}

static bool mlx5_npps_real_time_supported(struct mlx5_core_dev *mdev)
{}

static bool mlx5_modify_mtutc_allowed(struct mlx5_core_dev *mdev)
{}

static u32 mlx5_ptp_shift_constant(u32 dev_freq_khz)
{}

static s32 mlx5_ptp_getmaxphase(struct ptp_clock_info *ptp)
{}

static bool mlx5_is_mtutc_time_adj_cap(struct mlx5_core_dev *mdev, s64 delta)
{}

static int mlx5_set_mtutc(struct mlx5_core_dev *dev, u32 *mtutc, u32 size)
{}

static u64 mlx5_read_time(struct mlx5_core_dev *dev,
			  struct ptp_system_timestamp *sts,
			  bool real_time)
{}

static u64 read_internal_timer(const struct cyclecounter *cc)
{}

static void mlx5_update_clock_info_page(struct mlx5_core_dev *mdev)
{}

static void mlx5_pps_out(struct work_struct *work)
{}

static void mlx5_timestamp_overflow(struct work_struct *work)
{}

static int mlx5_ptp_settime_real_time(struct mlx5_core_dev *mdev,
				      const struct timespec64 *ts)
{}

static int mlx5_ptp_settime(struct ptp_clock_info *ptp, const struct timespec64 *ts)
{}

static
struct timespec64 mlx5_ptp_gettimex_real_time(struct mlx5_core_dev *mdev,
					      struct ptp_system_timestamp *sts)
{}

static int mlx5_ptp_gettimex(struct ptp_clock_info *ptp, struct timespec64 *ts,
			     struct ptp_system_timestamp *sts)
{}

static int mlx5_ptp_adjtime_real_time(struct mlx5_core_dev *mdev, s64 delta)
{}

static int mlx5_ptp_adjtime(struct ptp_clock_info *ptp, s64 delta)
{}

static int mlx5_ptp_adjphase(struct ptp_clock_info *ptp, s32 delta)
{}

static int mlx5_ptp_freq_adj_real_time(struct mlx5_core_dev *mdev, long scaled_ppm)
{}

static int mlx5_ptp_adjfine(struct ptp_clock_info *ptp, long scaled_ppm)
{}

static int mlx5_extts_configure(struct ptp_clock_info *ptp,
				struct ptp_clock_request *rq,
				int on)
{}

static u64 find_target_cycles(struct mlx5_core_dev *mdev, s64 target_ns)
{}

static u64 perout_conf_internal_timer(struct mlx5_core_dev *mdev, s64 sec)
{}

static u64 perout_conf_real_time(s64 sec, u32 nsec)
{}

static int perout_conf_1pps(struct mlx5_core_dev *mdev, struct ptp_clock_request *rq,
			    u64 *time_stamp, bool real_time)
{}

#define MLX5_MAX_PULSE_DURATION
static int mlx5_perout_conf_out_pulse_duration(struct mlx5_core_dev *mdev,
					       struct ptp_clock_request *rq,
					       u32 *out_pulse_duration_ns)
{}

static int perout_conf_npps_real_time(struct mlx5_core_dev *mdev, struct ptp_clock_request *rq,
				      u32 *field_select, u32 *out_pulse_duration_ns,
				      u64 *period, u64 *time_stamp)
{}

static bool mlx5_perout_verify_flags(struct mlx5_core_dev *mdev, unsigned int flags)
{}

static int mlx5_perout_configure(struct ptp_clock_info *ptp,
				 struct ptp_clock_request *rq,
				 int on)
{}

static int mlx5_pps_configure(struct ptp_clock_info *ptp,
			      struct ptp_clock_request *rq,
			      int on)
{}

static int mlx5_ptp_enable(struct ptp_clock_info *ptp,
			   struct ptp_clock_request *rq,
			   int on)
{}

enum {};

static int mlx5_ptp_verify(struct ptp_clock_info *ptp, unsigned int pin,
			   enum ptp_pin_function func, unsigned int chan)
{}

static const struct ptp_clock_info mlx5_ptp_clock_info =;

static int mlx5_query_mtpps_pin_mode(struct mlx5_core_dev *mdev, u8 pin,
				     u32 *mtpps, u32 mtpps_size)
{}

static int mlx5_get_pps_pin_mode(struct mlx5_clock *clock, u8 pin)
{}

static void mlx5_init_pin_config(struct mlx5_clock *clock)
{}

static void mlx5_get_pps_caps(struct mlx5_core_dev *mdev)
{}

static void ts_next_sec(struct timespec64 *ts)
{}

static u64 perout_conf_next_event_timer(struct mlx5_core_dev *mdev,
					struct mlx5_clock *clock)
{}

static int mlx5_pps_event(struct notifier_block *nb,
			  unsigned long type, void *data)
{}

static void mlx5_timecounter_init(struct mlx5_core_dev *mdev)
{}

static void mlx5_init_overflow_period(struct mlx5_clock *clock)
{}

static void mlx5_init_clock_info(struct mlx5_core_dev *mdev)
{}

static void mlx5_init_timer_max_freq_adjustment(struct mlx5_core_dev *mdev)
{}

static void mlx5_init_timer_clock(struct mlx5_core_dev *mdev)
{}

static void mlx5_init_pps(struct mlx5_core_dev *mdev)
{}

void mlx5_init_clock(struct mlx5_core_dev *mdev)
{}

void mlx5_cleanup_clock(struct mlx5_core_dev *mdev)
{}