linux/drivers/net/ethernet/mellanox/mlx5/core/steering/dr_ste.h

/* SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB */
/* Copyright (c) 2020 NVIDIA CORPORATION. All rights reserved. */

#ifndef	_DR_STE_
#define _DR_STE_

#include "dr_types.h"

#define STE_IPV4 …
#define STE_IPV6 …
#define STE_TCP …
#define STE_UDP …
#define STE_SPI …
#define IP_VERSION_IPV4 …
#define IP_VERSION_IPV6 …
#define STE_SVLAN …
#define STE_CVLAN …
#define HDR_LEN_L2_MACS …
#define HDR_LEN_L2_VLAN …
#define HDR_LEN_L2_ETHER …
#define HDR_LEN_L2 …
#define HDR_LEN_L2_W_VLAN …

/* Set to STE a specific value using DR_STE_SET */
#define DR_STE_SET_VAL(lookup_type, tag, t_fname, spec, s_fname, value) …

/* Set to STE spec->s_fname to tag->t_fname set spec->s_fname as used */
#define DR_STE_SET_TAG(lookup_type, tag, t_fname, spec, s_fname) …

/* Set to STE -1 to tag->t_fname and set spec->s_fname as used */
#define DR_STE_SET_ONES(lookup_type, tag, t_fname, spec, s_fname) …

#define DR_STE_SET_TCP_FLAGS(lookup_type, tag, spec) …

#define DR_STE_SET_MPLS(lookup_type, mask, in_out, tag) …

#define DR_STE_SET_FLEX_PARSER_FIELD(tag, fname, caps, spec) …

#define DR_STE_IS_OUTER_MPLS_OVER_GRE_SET(_misc) …

#define DR_STE_IS_OUTER_MPLS_OVER_UDP_SET(_misc) …

enum dr_ste_action_modify_type_l3 { … };

enum dr_ste_action_modify_type_l4 { … };

enum { … };

u16 mlx5dr_ste_conv_bit_to_byte_mask(u8 *bit_mask);

static inline u8 *
dr_ste_calc_flex_parser_offset(u8 *tag, u8 parser_id)
{ … }

#define DR_STE_CTX_BUILDER(fname) …

struct mlx5dr_ste_ctx { … };

struct mlx5dr_ste_ctx *mlx5dr_ste_get_ctx_v0(void);
struct mlx5dr_ste_ctx *mlx5dr_ste_get_ctx_v1(void);
struct mlx5dr_ste_ctx *mlx5dr_ste_get_ctx_v2(void);

#endif  /* _DR_STE_ */