linux/drivers/net/ethernet/mellanox/mlx5/core/dpll.c

// SPDX-License-Identifier: GPL-2.0 OR Linux-OpenIB
/* Copyright (c) 2023, NVIDIA CORPORATION & AFFILIATES. All rights reserved. */

#include <linux/dpll.h>
#include <linux/mlx5/driver.h>

/* This structure represents a reference to DPLL, one is created
 * per mdev instance.
 */
struct mlx5_dpll { … };

static int mlx5_dpll_clock_id_get(struct mlx5_core_dev *mdev, u64 *clock_id)
{ … }

struct mlx5_dpll_synce_status { … };

static int
mlx5_dpll_synce_status_get(struct mlx5_core_dev *mdev,
			   struct mlx5_dpll_synce_status *synce_status)
{ … }

static int
mlx5_dpll_synce_status_set(struct mlx5_core_dev *mdev,
			   enum mlx5_msees_admin_status admin_status)
{ … }

static enum dpll_lock_status
mlx5_dpll_lock_status_get(struct mlx5_dpll_synce_status *synce_status)
{ … }

static enum dpll_lock_status_error
mlx5_dpll_lock_status_error_get(struct mlx5_dpll_synce_status *synce_status)
{ … }

static enum dpll_pin_state
mlx5_dpll_pin_state_get(struct mlx5_dpll_synce_status *synce_status)
{ … }

static int
mlx5_dpll_pin_ffo_get(struct mlx5_dpll_synce_status *synce_status,
		      s64 *ffo)
{ … }

static int
mlx5_dpll_device_lock_status_get(const struct dpll_device *dpll, void *priv,
				 enum dpll_lock_status *status,
				 enum dpll_lock_status_error *status_error,
				 struct netlink_ext_ack *extack)
{ … }

static int mlx5_dpll_device_mode_get(const struct dpll_device *dpll,
				     void *priv, enum dpll_mode *mode,
				     struct netlink_ext_ack *extack)
{ … }

static const struct dpll_device_ops mlx5_dpll_device_ops = …;

static int mlx5_dpll_pin_direction_get(const struct dpll_pin *pin,
				       void *pin_priv,
				       const struct dpll_device *dpll,
				       void *dpll_priv,
				       enum dpll_pin_direction *direction,
				       struct netlink_ext_ack *extack)
{ … }

static int mlx5_dpll_state_on_dpll_get(const struct dpll_pin *pin,
				       void *pin_priv,
				       const struct dpll_device *dpll,
				       void *dpll_priv,
				       enum dpll_pin_state *state,
				       struct netlink_ext_ack *extack)
{ … }

static int mlx5_dpll_state_on_dpll_set(const struct dpll_pin *pin,
				       void *pin_priv,
				       const struct dpll_device *dpll,
				       void *dpll_priv,
				       enum dpll_pin_state state,
				       struct netlink_ext_ack *extack)
{ … }

static int mlx5_dpll_ffo_get(const struct dpll_pin *pin, void *pin_priv,
			     const struct dpll_device *dpll, void *dpll_priv,
			     s64 *ffo, struct netlink_ext_ack *extack)
{ … }

static const struct dpll_pin_ops mlx5_dpll_pins_ops = …;

static const struct dpll_pin_properties mlx5_dpll_pin_properties = …;

#define MLX5_DPLL_PERIODIC_WORK_INTERVAL …

static void mlx5_dpll_periodic_work_queue(struct mlx5_dpll *mdpll)
{ … }

static void mlx5_dpll_periodic_work(struct work_struct *work)
{ … }

static void mlx5_dpll_netdev_dpll_pin_set(struct mlx5_dpll *mdpll,
					  struct net_device *netdev)
{ … }

static void mlx5_dpll_netdev_dpll_pin_clear(struct mlx5_dpll *mdpll)
{ … }

static int mlx5_dpll_mdev_notifier_event(struct notifier_block *nb,
					 unsigned long event, void *data)
{ … }

static void mlx5_dpll_mdev_netdev_track(struct mlx5_dpll *mdpll,
					struct mlx5_core_dev *mdev)
{ … }

static void mlx5_dpll_mdev_netdev_untrack(struct mlx5_dpll *mdpll,
					  struct mlx5_core_dev *mdev)
{ … }

static int mlx5_dpll_probe(struct auxiliary_device *adev,
			   const struct auxiliary_device_id *id)
{ … }

static void mlx5_dpll_remove(struct auxiliary_device *adev)
{ … }

static int mlx5_dpll_suspend(struct auxiliary_device *adev, pm_message_t state)
{ … }

static int mlx5_dpll_resume(struct auxiliary_device *adev)
{ … }

static const struct auxiliary_device_id mlx5_dpll_id_table[] = …;

MODULE_DEVICE_TABLE(auxiliary, mlx5_dpll_id_table);

static struct auxiliary_driver mlx5_dpll_driver = …;

static int __init mlx5_dpll_init(void)
{ … }

static void __exit mlx5_dpll_exit(void)
{ … }

module_init(…) …;
module_exit(mlx5_dpll_exit);

MODULE_AUTHOR(…) …;
MODULE_DESCRIPTION(…) …;
MODULE_LICENSE(…) …;