/* SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause */ /* Header file for Gigabit Ethernet driver for Mellanox BlueField SoC * - this file contains software data structures and any chip-specific * data structures (e.g. TX WQE format) that are memory resident. * * Copyright (C) 2020-2021 NVIDIA CORPORATION & AFFILIATES */ #ifndef __MLXBF_GIGE_H__ #define __MLXBF_GIGE_H__ #include <linux/io-64-nonatomic-lo-hi.h> #include <linux/irqreturn.h> #include <linux/netdevice.h> #include <linux/irq.h> #include <linux/phy.h> /* The silicon design supports a maximum RX ring size of * 32K entries. Based on current testing this maximum size * is not required to be supported. Instead the RX ring * will be capped at a realistic value of 1024 entries. */ #define MLXBF_GIGE_MIN_RXQ_SZ … #define MLXBF_GIGE_MAX_RXQ_SZ … #define MLXBF_GIGE_DEFAULT_RXQ_SZ … #define MLXBF_GIGE_MIN_TXQ_SZ … #define MLXBF_GIGE_MAX_TXQ_SZ … #define MLXBF_GIGE_DEFAULT_TXQ_SZ … #define MLXBF_GIGE_DEFAULT_BUF_SZ … #define MLXBF_GIGE_DMA_PAGE_SZ … #define MLXBF_GIGE_DMA_PAGE_SHIFT … /* There are four individual MAC RX filters. Currently * two of them are being used: one for the broadcast MAC * (index 0) and one for local MAC (index 1) */ #define MLXBF_GIGE_BCAST_MAC_FILTER_IDX … #define MLXBF_GIGE_LOCAL_MAC_FILTER_IDX … /* Define for broadcast MAC literal */ #define BCAST_MAC_ADDR … /* There are three individual interrupts: * 1) Errors, "OOB" interrupt line * 2) Receive Packet, "OOB_LLU" interrupt line * 3) LLU and PLU Events, "OOB_PLU" interrupt line */ #define MLXBF_GIGE_ERROR_INTR_IDX … #define MLXBF_GIGE_RECEIVE_PKT_INTR_IDX … #define MLXBF_GIGE_LLU_PLU_INTR_IDX … struct mlxbf_gige_stats { … }; struct mlxbf_gige_reg_param { … }; struct mlxbf_gige_mdio_gw { … }; struct mlxbf_gige_link_cfg { … }; struct mlxbf_gige { … }; /* Rx Work Queue Element definitions */ #define MLXBF_GIGE_RX_WQE_SZ … /* Rx Completion Queue Element definitions */ #define MLXBF_GIGE_RX_CQE_SZ … #define MLXBF_GIGE_RX_CQE_PKT_LEN_MASK … #define MLXBF_GIGE_RX_CQE_VALID_MASK … #define MLXBF_GIGE_RX_CQE_PKT_STATUS_MASK … #define MLXBF_GIGE_RX_CQE_PKT_STATUS_MAC_ERR … #define MLXBF_GIGE_RX_CQE_PKT_STATUS_TRUNCATED … #define MLXBF_GIGE_RX_CQE_CHKSUM_MASK … /* Tx Work Queue Element definitions */ #define MLXBF_GIGE_TX_WQE_SZ_QWORDS … #define MLXBF_GIGE_TX_WQE_SZ … #define MLXBF_GIGE_TX_WQE_PKT_LEN_MASK … #define MLXBF_GIGE_TX_WQE_UPDATE_MASK … #define MLXBF_GIGE_TX_WQE_CHKSUM_LEN_MASK … #define MLXBF_GIGE_TX_WQE_CHKSUM_START_MASK … #define MLXBF_GIGE_TX_WQE_CHKSUM_OFFSET_MASK … /* Macro to return packet length of specified TX WQE */ #define MLXBF_GIGE_TX_WQE_PKT_LEN(tx_wqe_addr) … /* Tx Completion Count */ #define MLXBF_GIGE_TX_CC_SZ … /* List of resources in ACPI table */ enum mlxbf_gige_res { … }; /* Version of register data returned by mlxbf_gige_get_regs() */ #define MLXBF_GIGE_REGS_VERSION … int mlxbf_gige_mdio_probe(struct platform_device *pdev, struct mlxbf_gige *priv); void mlxbf_gige_mdio_remove(struct mlxbf_gige *priv); void mlxbf_gige_set_mac_rx_filter(struct mlxbf_gige *priv, unsigned int index, u64 dmac); void mlxbf_gige_get_mac_rx_filter(struct mlxbf_gige *priv, unsigned int index, u64 *dmac); void mlxbf_gige_enable_promisc(struct mlxbf_gige *priv); void mlxbf_gige_disable_promisc(struct mlxbf_gige *priv); int mlxbf_gige_rx_init(struct mlxbf_gige *priv); void mlxbf_gige_rx_deinit(struct mlxbf_gige *priv); int mlxbf_gige_tx_init(struct mlxbf_gige *priv); void mlxbf_gige_tx_deinit(struct mlxbf_gige *priv); bool mlxbf_gige_handle_tx_complete(struct mlxbf_gige *priv); netdev_tx_t mlxbf_gige_start_xmit(struct sk_buff *skb, struct net_device *netdev); struct sk_buff *mlxbf_gige_alloc_skb(struct mlxbf_gige *priv, unsigned int map_len, dma_addr_t *buf_dma, enum dma_data_direction dir); int mlxbf_gige_request_irqs(struct mlxbf_gige *priv); void mlxbf_gige_free_irqs(struct mlxbf_gige *priv); int mlxbf_gige_poll(struct napi_struct *napi, int budget); extern const struct ethtool_ops mlxbf_gige_ethtool_ops; void mlxbf_gige_update_tx_wqe_next(struct mlxbf_gige *priv); #endif /* !defined(__MLXBF_GIGE_H__) */
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