linux/drivers/net/ethernet/mellanox/mlxbf_gige/mlxbf_gige_regs.h

/* SPDX-License-Identifier: GPL-2.0-only OR BSD-3-Clause */

/* Header file for Mellanox BlueField GigE register defines
 *
 * Copyright (C) 2020-2021 NVIDIA CORPORATION & AFFILIATES
 */

#ifndef __MLXBF_GIGE_REGS_H__
#define __MLXBF_GIGE_REGS_H__

#include <linux/bitfield.h>

#define MLXBF_GIGE_VERSION
#define MLXBF_GIGE_VERSION_BF2
#define MLXBF_GIGE_VERSION_BF3
#define MLXBF_GIGE_STATUS
#define MLXBF_GIGE_STATUS_READY
#define MLXBF_GIGE_INT_STATUS
#define MLXBF_GIGE_INT_STATUS_RX_RECEIVE_PACKET
#define MLXBF_GIGE_INT_STATUS_RX_MAC_ERROR
#define MLXBF_GIGE_INT_STATUS_RX_TRN_ERROR
#define MLXBF_GIGE_INT_STATUS_SW_ACCESS_ERROR
#define MLXBF_GIGE_INT_STATUS_SW_CONFIG_ERROR
#define MLXBF_GIGE_INT_STATUS_TX_PI_CI_EXCEED_WQ_SIZE
#define MLXBF_GIGE_INT_STATUS_TX_SMALL_FRAME_SIZE
#define MLXBF_GIGE_INT_STATUS_TX_CHECKSUM_INPUTS
#define MLXBF_GIGE_INT_STATUS_HW_ACCESS_ERROR
#define MLXBF_GIGE_INT_EN
#define MLXBF_GIGE_INT_EN_RX_RECEIVE_PACKET
#define MLXBF_GIGE_INT_EN_RX_MAC_ERROR
#define MLXBF_GIGE_INT_EN_RX_TRN_ERROR
#define MLXBF_GIGE_INT_EN_SW_ACCESS_ERROR
#define MLXBF_GIGE_INT_EN_SW_CONFIG_ERROR
#define MLXBF_GIGE_INT_EN_TX_PI_CI_EXCEED_WQ_SIZE
#define MLXBF_GIGE_INT_EN_TX_SMALL_FRAME_SIZE
#define MLXBF_GIGE_INT_EN_TX_CHECKSUM_INPUTS
#define MLXBF_GIGE_INT_EN_HW_ACCESS_ERROR
#define MLXBF_GIGE_INT_MASK
#define MLXBF_GIGE_INT_MASK_RX_RECEIVE_PACKET
#define MLXBF_GIGE_CONTROL
#define MLXBF_GIGE_CONTROL_PORT_EN
#define MLXBF_GIGE_CONTROL_MAC_ID_RANGE_EN
#define MLXBF_GIGE_CONTROL_EN_SPECIFIC_MAC
#define MLXBF_GIGE_CONTROL_CLEAN_PORT_EN
#define MLXBF_GIGE_RX_WQ_BASE
#define MLXBF_GIGE_RX_WQE_SIZE_LOG2
#define MLXBF_GIGE_RX_WQE_SIZE_LOG2_RESET_VAL
#define MLXBF_GIGE_RX_CQ_BASE
#define MLXBF_GIGE_TX_WQ_BASE
#define MLXBF_GIGE_TX_WQ_SIZE_LOG2
#define MLXBF_GIGE_TX_WQ_SIZE_LOG2_RESET_VAL
#define MLXBF_GIGE_TX_CI_UPDATE_ADDRESS
#define MLXBF_GIGE_RX_WQE_PI
#define MLXBF_GIGE_TX_PRODUCER_INDEX
#define MLXBF_GIGE_RX_MAC_FILTER
#define MLXBF_GIGE_RX_MAC_FILTER_STRIDE
#define MLXBF_GIGE_RX_DIN_DROP_COUNTER
#define MLXBF_GIGE_TX_CONSUMER_INDEX
#define MLXBF_GIGE_TX_CONTROL
#define MLXBF_GIGE_TX_CONTROL_GRACEFUL_STOP
#define MLXBF_GIGE_TX_STATUS
#define MLXBF_GIGE_TX_STATUS_DATA_FIFO_FULL
#define MLXBF_GIGE_RX_MAC_FILTER_DMAC_RANGE_START
#define MLXBF_GIGE_RX_MAC_FILTER_DMAC_RANGE_END
#define MLXBF_GIGE_RX_MAC_FILTER_COUNT_DISC
#define MLXBF_GIGE_RX_MAC_FILTER_COUNT_DISC_EN
#define MLXBF_GIGE_RX_MAC_FILTER_COUNT_PASS
#define MLXBF_GIGE_RX_MAC_FILTER_COUNT_PASS_EN
#define MLXBF_GIGE_RX_PASS_COUNTER_ALL
#define MLXBF_GIGE_RX_DISC_COUNTER_ALL
#define MLXBF_GIGE_RX
#define MLXBF_GIGE_RX_STRIP_CRC_EN
#define MLXBF_GIGE_RX_DMA
#define MLXBF_GIGE_RX_DMA_EN
#define MLXBF_GIGE_RX_CQE_PACKET_CI
#define MLXBF_GIGE_MAC_CFG

/* NOTE: MLXBF_GIGE_MAC_CFG is the last defined register offset,
 * so use that plus size of single register to derive total size
 */
#define MLXBF_GIGE_MMIO_REG_SZ

#define MLXBF_GIGE_PLU_TX_REG0
#define MLXBF_GIGE_PLU_TX_IPG_SIZE_MASK
#define MLXBF_GIGE_PLU_TX_SGMII_MODE_MASK

#define MLXBF_GIGE_PLU_RX_REG0
#define MLXBF_GIGE_PLU_RX_SGMII_MODE_MASK

#define MLXBF_GIGE_1G_SGMII_MODE
#define MLXBF_GIGE_10M_SGMII_MODE
#define MLXBF_GIGE_100M_SGMII_MODE

/* ipg_size default value for 1G is fixed by HW to 11 + End = 12.
 * So for 100M it is 12 * 10 - 1 = 119
 * For 10M, it is 12 * 100 - 1 = 1199
 */
#define MLXBF_GIGE_1G_IPG_SIZE
#define MLXBF_GIGE_100M_IPG_SIZE
#define MLXBF_GIGE_10M_IPG_SIZE

/* Offsets into OOB LLU block for pause frame counters */
#define MLXBF_GIGE_BF2_TX_PAUSE_CNT_HI
#define MLXBF_GIGE_BF2_TX_PAUSE_CNT_LO
#define MLXBF_GIGE_BF2_RX_PAUSE_CNT_HI
#define MLXBF_GIGE_BF2_RX_PAUSE_CNT_LO

#define MLXBF_GIGE_BF3_TX_PAUSE_CNT_HI
#define MLXBF_GIGE_BF3_TX_PAUSE_CNT_LO
#define MLXBF_GIGE_BF3_RX_PAUSE_CNT_HI
#define MLXBF_GIGE_BF3_RX_PAUSE_CNT_LO

#define MLXBF_GIGE_TX_PAUSE_CNT_HI
#define MLXBF_GIGE_TX_PAUSE_CNT_LO
#define MLXBF_GIGE_RX_PAUSE_CNT_HI
#define MLXBF_GIGE_RX_PAUSE_CNT_LO

#define MLXBF_GIGE_BF2_LLU_GENERAL_CONFIG
#define MLXBF_GIGE_BF3_LLU_GENERAL_CONFIG

#define MLXBF_GIGE_BF2_LLU_COUNTERS_EN
#define MLXBF_GIGE_BF3_LLU_COUNTERS_EN

#endif /* !defined(__MLXBF_GIGE_REGS_H__) */